From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42612) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UoFLX-0007U2-58 for qemu-devel@nongnu.org; Sun, 16 Jun 2013 11:58:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UoFLV-0007AQ-0Z for qemu-devel@nongnu.org; Sun, 16 Jun 2013 11:58:27 -0400 Received: from cantor2.suse.de ([195.135.220.15]:60044 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UoFLU-0007AC-QN for qemu-devel@nongnu.org; Sun, 16 Jun 2013 11:58:24 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 44694A5077 for ; Sun, 16 Jun 2013 17:58:24 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sun, 16 Jun 2013 17:57:46 +0200 Message-Id: <1371398269-6213-27-git-send-email-afaerber@suse.de> In-Reply-To: <1371398269-6213-1-git-send-email-afaerber@suse.de> References: <1371398269-6213-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-cpu v2 26/29] intc/sh_intc: Build sh_intc only once List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Since converting first_cpu to CPUState and making CPU_INTERRUPT_HARD available through qom/cpu.h, it no longer depends on CPUSH4State. This allows sharing across sh4 and sh4eb. Signed-off-by: Andreas F=C3=A4rber --- hw/intc/Makefile.objs | 2 +- hw/intc/sh_intc.c | 1 + include/hw/sh4/sh.h | 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs index 3e68d2e..9e92a0b 100644 --- a/hw/intc/Makefile.objs +++ b/hw/intc/Makefile.objs @@ -10,6 +10,7 @@ common-obj-$(CONFIG_REALVIEW) +=3D realview_gic.o common-obj-$(CONFIG_SLAVIO) +=3D slavio_intctl.o common-obj-$(CONFIG_IOAPIC) +=3D ioapic_common.o common-obj-$(CONFIG_ARM_GIC) +=3D arm_gic_common.o +common-obj-$(CONFIG_SH4) +=3D sh_intc.o =20 obj-$(CONFIG_APIC) +=3D apic.o apic_common.o obj-$(CONFIG_ARM_GIC) +=3D arm_gic.o @@ -20,4 +21,3 @@ obj-$(CONFIG_GRLIB) +=3D grlib_irqmp.o obj-$(CONFIG_IOAPIC) +=3D ioapic.o obj-$(CONFIG_OMAP) +=3D omap_intc.o obj-$(CONFIG_OPENPIC) +=3D openpic.o -obj-$(CONFIG_SH4) +=3D sh_intc.o diff --git a/hw/intc/sh_intc.c b/hw/intc/sh_intc.c index f1138e3..b8d9ff0 100644 --- a/hw/intc/sh_intc.c +++ b/hw/intc/sh_intc.c @@ -11,6 +11,7 @@ #include "hw/sh4/sh_intc.h" #include "hw/hw.h" #include "hw/sh4/sh.h" +#include "qom/cpu.h" =20 //#define DEBUG_INTC //#define DEBUG_INTC_SOURCES diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h index e61de9a..4ebafcc 100644 --- a/include/hw/sh4/sh.h +++ b/include/hw/sh4/sh.h @@ -11,7 +11,9 @@ struct SH7750State; struct MemoryRegion; =20 +#ifdef CONFIG_SOFTMMU struct SH7750State *sh7750_init(SuperHCPU *cpu, struct MemoryRegion *sys= mem); +#endif =20 typedef struct { /* The callback will be triggered if any of the designated lines cha= nge */ --=20 1.8.1.4