From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49633) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UoxHR-0001yG-53 for qemu-devel@nongnu.org; Tue, 18 Jun 2013 10:53:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UoxHP-0007n1-Iv for qemu-devel@nongnu.org; Tue, 18 Jun 2013 10:53:09 -0400 From: Fabien Chouteau Date: Tue, 18 Jun 2013 16:53:01 +0200 Message-Id: <1371567181-4917-2-git-send-email-chouteau@adacore.com> In-Reply-To: <1371567181-4917-1-git-send-email-chouteau@adacore.com> References: <1371567181-4917-1-git-send-email-chouteau@adacore.com> Subject: [Qemu-devel] [PATCH 2/2] PPC: Fix GDB read on code area for PPC6xx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, agraf@suse.de On PPC 6xx, data and code have separated TLBs. Until now QEMU was only looking at data TLBs, which is not good when GDB wants to read code. This patch adds a second call to get_physical_address() with an ACCESS_CODE type of access when the first call with ACCESS_INT fails. Signed-off-by: Fabien Chouteau --- target-ppc/mmu_helper.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c index 910e022..19f0b8c 100644 --- a/target-ppc/mmu_helper.c +++ b/target-ppc/mmu_helper.c @@ -1378,7 +1378,15 @@ hwaddr cpu_get_phys_page_debug(CPUPPCState *env, target_ulong addr) } if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) { - return -1; + + /* Some MMUs have separate TLBs for code and data. If we only try an + * ACCESS_INT, we may not be able to read instructions mapped by code + * TLBs, so we also try a ACCESS_CODE. + */ + if (unlikely(get_physical_address(env, &ctx, addr, 0, + ACCESS_CODE) != 0)) { + return -1; + } } return ctx.raddr & TARGET_PAGE_MASK; -- 1.7.9.5