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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 17/25] spapr: use memory core for iommu support
Date: Thu, 20 Jun 2013 16:44:45 +0200	[thread overview]
Message-ID: <1371739493-10187-18-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1371739493-10187-1-git-send-email-pbonzini@redhat.com>

Now we can stop using a "translating" DMAContext, but we do not yet modify
the sPAPRTCETable users to get an AddressSpace; they keep using the table
via a DMAContext.

Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/ppc/spapr_iommu.c   | 48 +++++++++++++++++++++++++++---------------------
 include/hw/ppc/spapr.h |  1 +
 2 files changed, 28 insertions(+), 21 deletions(-)

diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c
index cf5ccb1..6e33929 100644
--- a/hw/ppc/spapr_iommu.c
+++ b/hw/ppc/spapr_iommu.c
@@ -37,12 +37,16 @@ enum sPAPRTCEAccess {
 };
 
 struct sPAPRTCETable {
+    /* temporary until everyone has its own AddressSpace */
     DMAContext dma;
+    AddressSpace as;
+
     uint32_t liobn;
     uint32_t window_size;
     sPAPRTCE *table;
     bool bypass;
     int fd;
+    MemoryRegion iommu;
     QLIST_ENTRY(sPAPRTCETable) list;
 };
 
@@ -68,8 +72,9 @@ static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
     return NULL;
 }
 
-static IOMMUTLBEntry spapr_tce_translate_iommu(sPAPRTCETable *tcet, hwaddr addr)
+static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
 {
+    sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
     uint64_t tce;
 
 #ifdef DEBUG_TCE
@@ -111,24 +116,9 @@ static IOMMUTLBEntry spapr_tce_translate_iommu(sPAPRTCETable *tcet, hwaddr addr)
     };
 }
 
-static int spapr_tce_translate(DMAContext *dma,
-                               dma_addr_t addr,
-                               hwaddr *paddr,
-                               hwaddr *len,
-                               DMADirection dir)
- {
-    sPAPRTCETable *tcet = DO_UPCAST(sPAPRTCETable, dma, dma);
-    bool is_write = (dir == DMA_DIRECTION_FROM_DEVICE);
-    IOMMUTLBEntry entry = spapr_tce_translate_iommu(tcet, addr);
-    if (!(entry.perm & (1 << is_write))) {
-        return -EPERM;
-    }
-
-    /* Translate */
-    *paddr = entry.translated_addr | (addr & entry.addr_mask);
-    *len = (addr | entry.addr_mask) - addr + 1;
-    return 0;
-}
+static MemoryRegionIOMMUOps spapr_iommu_ops = {
+    .translate = spapr_tce_translate_iommu,
+};
 
 sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
 {
@@ -145,8 +135,6 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
     }
 
     tcet = g_malloc0(sizeof(*tcet));
-    dma_context_init(&tcet->dma, &address_space_memory, spapr_tce_translate, NULL, NULL);
-
     tcet->liobn = liobn;
     tcet->window_size = window_size;
 
@@ -167,6 +155,11 @@ sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size)
             "table @ %p, fd=%d\n", tcet, liobn, tcet->table, tcet->fd);
 #endif
 
+    memory_region_init_iommu(&tcet->iommu, &spapr_iommu_ops,
+                             "iommu-spapr", UINT64_MAX);
+    address_space_init(&tcet->as, &tcet->iommu);
+    dma_context_init(&tcet->dma, &tcet->as, NULL, NULL, NULL);
+
     QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
 
     return tcet;
@@ -190,6 +183,11 @@ DMAContext *spapr_tce_get_dma(sPAPRTCETable *tcet)
     return &tcet->dma;
 }
 
+MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
+{
+    return &tcet->iommu;
+}
+
 void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
 {
     tcet->bypass = bypass;
@@ -208,6 +206,7 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
                                 target_ulong tce)
 {
     sPAPRTCE *tcep;
+    IOMMUTLBEntry entry;
 
     if (ioba >= tcet->window_size) {
         hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
@@ -218,6 +217,13 @@ static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
     tcep = tcet->table + (ioba >> SPAPR_TCE_PAGE_SHIFT);
     tcep->tce = tce;
 
+    entry.target_as = &address_space_memory,
+    entry.iova = ioba & ~SPAPR_TCE_PAGE_MASK;
+    entry.translated_addr = tce & ~SPAPR_TCE_PAGE_MASK;
+    entry.addr_mask = SPAPR_TCE_PAGE_MASK;
+    entry.perm = tce;
+    memory_region_notify_iommu(&tcet->iommu, entry);
+
     return H_SUCCESS;
 }
 
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index e8d617b..142abb7 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -349,6 +349,7 @@ void spapr_events_init(sPAPREnvironment *spapr);
 void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq);
 sPAPRTCETable *spapr_tce_new_table(uint32_t liobn, size_t window_size);
 DMAContext *spapr_tce_get_dma(sPAPRTCETable *tcet);
+MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet);
 void spapr_tce_free(sPAPRTCETable *tcet);
 void spapr_tce_reset(sPAPRTCETable *tcet);
 void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass);
-- 
1.8.1.4

  parent reply	other threads:[~2013-06-20 14:45 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-20 14:44 [Qemu-devel] [PULL 00/25] Memory/IOMMU patches, part 3: IOMMU implementation Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 01/25] exec.c: address_space_translate: handle access to addr 0 of 2^64 sized region Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 02/25] memory: Introduce address_space_lookup_region Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 03/25] memory: move private types to exec.c Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 04/25] exec: Allow unaligned address_space_rw Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 05/25] exec: Resolve subpages in one step except for IOTLB fills Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 06/25] exec: Implement subpage_read/write via address_space_rw Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 07/25] exec: return MemoryRegion from address_space_translate Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 08/25] Revert "memory: limit sections in the radix tree to the actual address space size" Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 09/25] Revert "s390x: reduce TARGET_PHYS_ADDR_SPACE_BITS to 62" Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 10/25] exec: reorganize mem_add to match Int128 version Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 11/25] memory: make section size a 128-bit integer Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 12/25] memory: iommu support Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 13/25] memory: Add iommu map/unmap notifiers Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 14/25] vfio: abort if an emulated iommu is used Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 15/25] spapr: convert TCE API to use an opaque type Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 16/25] spapr: make IOMMU translation go through IOMMUTLBEntry Paolo Bonzini
2013-06-20 14:44 ` Paolo Bonzini [this message]
2013-06-20 14:44 ` [Qemu-devel] [PATCH 18/25] dma: eliminate old-style IOMMU support Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 19/25] pci: use memory core for iommu support Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 20/25] spapr_vio: take care of creating our own AddressSpace/DMAContext Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 21/25] dma: eliminate DMAContext Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 22/25] memory: give name to every AddressSpace Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 23/25] memory: Fix comment typo Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 24/25] memory: as_update_topology_pass: Improve comments Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 25/25] memory: render_memory_region: factor out fr constant setters Paolo Bonzini

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