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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Avi Kivity <avi.kivity@gmail.com>,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PATCH 19/25] pci: use memory core for iommu support
Date: Thu, 20 Jun 2013 16:44:47 +0200	[thread overview]
Message-ID: <1371739493-10187-20-git-send-email-pbonzini@redhat.com> (raw)
In-Reply-To: <1371739493-10187-1-git-send-email-pbonzini@redhat.com>

From: Avi Kivity <avi.kivity@gmail.com>

Use the new iommu support in the memory core for iommu support.  The only
user, spapr, is also converted, but it still provides a DMAContext
interface until the non-PCI bits switch to AddressSpace.

Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Avi Kivity <avi.kivity@gmail.com>
[ Do not calls memory_region_del_subregion() on the device's
  bus_master_enable_region, it is an alias; return an AddressSpace
  from the IOMMU hook and remove the destructor hook. - David Gibson ]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/pci/pci.c                | 39 +++++++++++++++++++--------------------
 hw/ppc/spapr_pci.c          |  8 ++++----
 include/hw/pci-host/spapr.h |  1 +
 include/hw/pci/pci.h        |  4 ++--
 include/hw/pci/pci_bus.h    |  4 ++--
 5 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 3bcd07d..ed9c8a1 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -786,6 +786,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
     PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(pci_dev);
     PCIConfigReadFunc *config_read = pc->config_read;
     PCIConfigWriteFunc *config_write = pc->config_write;
+    AddressSpace *dma_as;
 
     if (devfn < 0) {
         for(devfn = bus->devfn_min ; devfn < ARRAY_SIZE(bus->devices);
@@ -801,22 +802,22 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
                      PCI_SLOT(devfn), PCI_FUNC(devfn), name, bus->devices[devfn]->name);
         return NULL;
     }
+
     pci_dev->bus = bus;
-    if (bus->dma_context_fn) {
-        pci_dev->dma = bus->dma_context_fn(bus, bus->dma_context_opaque, devfn);
+    if (bus->iommu_fn) {
+        dma_as = bus->iommu_fn(bus, bus->iommu_opaque, devfn);
     } else {
-        /* FIXME: Make dma_context_fn use MemoryRegions instead, so this path is
-         * taken unconditionally */
         /* FIXME: inherit memory region from bus creator */
-        memory_region_init_alias(&pci_dev->bus_master_enable_region, "bus master",
-                                 get_system_memory(), 0,
-                                 memory_region_size(get_system_memory()));
-        memory_region_set_enabled(&pci_dev->bus_master_enable_region, false);
-        address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region);
-        pci_dev->dma = g_new(DMAContext, 1);
-        dma_context_init(pci_dev->dma, &pci_dev->bus_master_as);
+        dma_as = &address_space_memory;
     }
 
+    memory_region_init_alias(&pci_dev->bus_master_enable_region, "bus master",
+                             dma_as->root, 0, memory_region_size(dma_as->root));
+    memory_region_set_enabled(&pci_dev->bus_master_enable_region, false);
+    address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region);
+    pci_dev->dma = g_new(DMAContext, 1);
+    dma_context_init(pci_dev->dma, &pci_dev->bus_master_as);
+
     pci_dev->devfn = devfn;
     pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
     pci_dev->irq_state = 0;
@@ -870,12 +871,10 @@ static void do_pci_unregister_device(PCIDevice *pci_dev)
     pci_dev->bus->devices[pci_dev->devfn] = NULL;
     pci_config_free(pci_dev);
 
-    if (!pci_dev->bus->dma_context_fn) {
-        address_space_destroy(&pci_dev->bus_master_as);
-        memory_region_destroy(&pci_dev->bus_master_enable_region);
-        g_free(pci_dev->dma);
-        pci_dev->dma = NULL;
-    }
+    address_space_destroy(&pci_dev->bus_master_as);
+    memory_region_destroy(&pci_dev->bus_master_enable_region);
+    g_free(pci_dev->dma);
+    pci_dev->dma = NULL;
 }
 
 static void pci_unregister_io_regions(PCIDevice *pci_dev)
@@ -2232,10 +2231,10 @@ static void pci_device_class_init(ObjectClass *klass, void *data)
     k->props = pci_props;
 }
 
-void pci_setup_iommu(PCIBus *bus, PCIDMAContextFunc fn, void *opaque)
+void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque)
 {
-    bus->dma_context_fn = fn;
-    bus->dma_context_opaque = opaque;
+    bus->iommu_fn = fn;
+    bus->iommu_opaque = opaque;
 }
 
 static const TypeInfo pci_device_type_info = {
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index eb64a8f..459398c 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -506,12 +506,11 @@ static const MemoryRegionOps spapr_msi_ops = {
 /*
  * PHB PCI device
  */
-static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus, void *opaque,
-                                            int devfn)
+static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
 {
     sPAPRPHBState *phb = opaque;
 
-    return spapr_tce_get_dma(phb->tcet);
+    return &phb->iommu_as;
 }
 
 static int spapr_phb_init(SysBusDevice *s)
@@ -651,7 +650,8 @@ static int spapr_phb_init(SysBusDevice *s)
         fprintf(stderr, "Unable to create TCE table for %s\n", sphb->dtbusname);
         return -1;
     }
-    pci_setup_iommu(bus, spapr_pci_dma_context_fn, sphb);
+    address_space_init(&sphb->iommu_as, spapr_tce_get_iommu(sphb->tcet));
+    pci_setup_iommu(bus, spapr_pci_dma_iommu, sphb);
 
     QLIST_INSERT_HEAD(&spapr->phbs, sphb, list);
 
diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h
index 653dd40..1e23dbf 100644
--- a/include/hw/pci-host/spapr.h
+++ b/include/hw/pci-host/spapr.h
@@ -50,6 +50,7 @@ typedef struct sPAPRPHBState {
     uint64_t dma_window_start;
     uint64_t dma_window_size;
     sPAPRTCETable *tcet;
+    AddressSpace iommu_as;
 
     struct {
         uint32_t irq;
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8d075ab..3a85bce 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -401,9 +401,9 @@ int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp,
 
 void pci_device_deassert_intx(PCIDevice *dev);
 
-typedef DMAContext *(*PCIDMAContextFunc)(PCIBus *, void *, int);
+typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int);
 
-void pci_setup_iommu(PCIBus *bus, PCIDMAContextFunc fn, void *opaque);
+void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque);
 
 static inline void
 pci_set_byte(uint8_t *config, uint8_t val)
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 6ee443c..66762f6 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -10,8 +10,8 @@
 
 struct PCIBus {
     BusState qbus;
-    PCIDMAContextFunc dma_context_fn;
-    void *dma_context_opaque;
+    PCIIOMMUFunc iommu_fn;
+    void *iommu_opaque;
     uint8_t devfn_min;
     pci_set_irq_fn set_irq;
     pci_map_irq_fn map_irq;
-- 
1.8.1.4

  parent reply	other threads:[~2013-06-20 14:45 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-20 14:44 [Qemu-devel] [PULL 00/25] Memory/IOMMU patches, part 3: IOMMU implementation Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 01/25] exec.c: address_space_translate: handle access to addr 0 of 2^64 sized region Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 02/25] memory: Introduce address_space_lookup_region Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 03/25] memory: move private types to exec.c Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 04/25] exec: Allow unaligned address_space_rw Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 05/25] exec: Resolve subpages in one step except for IOTLB fills Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 06/25] exec: Implement subpage_read/write via address_space_rw Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 07/25] exec: return MemoryRegion from address_space_translate Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 08/25] Revert "memory: limit sections in the radix tree to the actual address space size" Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 09/25] Revert "s390x: reduce TARGET_PHYS_ADDR_SPACE_BITS to 62" Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 10/25] exec: reorganize mem_add to match Int128 version Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 11/25] memory: make section size a 128-bit integer Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 12/25] memory: iommu support Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 13/25] memory: Add iommu map/unmap notifiers Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 14/25] vfio: abort if an emulated iommu is used Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 15/25] spapr: convert TCE API to use an opaque type Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 16/25] spapr: make IOMMU translation go through IOMMUTLBEntry Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 17/25] spapr: use memory core for iommu support Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 18/25] dma: eliminate old-style IOMMU support Paolo Bonzini
2013-06-20 14:44 ` Paolo Bonzini [this message]
2013-06-20 14:44 ` [Qemu-devel] [PATCH 20/25] spapr_vio: take care of creating our own AddressSpace/DMAContext Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 21/25] dma: eliminate DMAContext Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 22/25] memory: give name to every AddressSpace Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 23/25] memory: Fix comment typo Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 24/25] memory: as_update_topology_pass: Improve comments Paolo Bonzini
2013-06-20 14:44 ` [Qemu-devel] [PATCH 25/25] memory: render_memory_region: factor out fr constant setters Paolo Bonzini

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