From: Gerd Hoffmann <kraxel@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Andreas Färber" <afaerber@suse.de>,
"Kuo-Jung Su" <dantesu@faraday-tech.com>,
"Gerd Hoffmann" <kraxel@redhat.com>
Subject: [Qemu-devel] [PATCH 5/9] usb/hcd-ehci: Add Faraday FUSBH200 support
Date: Mon, 24 Jun 2013 08:44:39 +0200 [thread overview]
Message-ID: <1372056283-4845-6-git-send-email-kraxel@redhat.com> (raw)
In-Reply-To: <1372056283-4845-1-git-send-email-kraxel@redhat.com>
From: Kuo-Jung Su <dantesu@faraday-tech.com>
Add Faraday FUSBH200 support, which is slightly different from EHCI spec.
(Or maybe simply a bad/wrong implementation...)
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/usb/hcd-ehci-sysbus.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++
hw/usb/hcd-ehci.h | 12 ++++++++
2 files changed, 87 insertions(+)
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index bad9ca6..e7d4f74 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -124,12 +124,87 @@ static const TypeInfo ehci_tegra2_type_info = {
.class_init = ehci_tegra2_class_init,
};
+/*
+ * Faraday FUSBH200 USB 2.0 EHCI
+ */
+
+/**
+ * FUSBH200EHCIRegs:
+ * @FUSBH200_REG_EOF_ASTR: EOF/Async. Sleep Timer Register
+ * @FUSBH200_REG_BMCSR: Bus Monitor Control/Status Register
+ */
+enum FUSBH200EHCIRegs {
+ FUSBH200_REG_EOF_ASTR = 0x34,
+ FUSBH200_REG_BMCSR = 0x40,
+};
+
+static uint64_t fusbh200_ehci_read(void *opaque, hwaddr addr, unsigned size)
+{
+ EHCIState *s = opaque;
+ hwaddr off = s->opregbase + s->portscbase + 4 * s->portnr + addr;
+
+ switch (off) {
+ case FUSBH200_REG_EOF_ASTR:
+ return 0x00000041;
+ case FUSBH200_REG_BMCSR:
+ /* High-Speed, VBUS valid, interrupt level-high active */
+ return (2 << 9) | (1 << 8) | (1 << 3);
+ }
+
+ return 0;
+}
+
+static void fusbh200_ehci_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned size)
+{
+}
+
+static const MemoryRegionOps fusbh200_ehci_mmio_ops = {
+ .read = fusbh200_ehci_read,
+ .write = fusbh200_ehci_write,
+ .valid.min_access_size = 4,
+ .valid.max_access_size = 4,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+};
+
+static void fusbh200_ehci_init(Object *obj)
+{
+ EHCISysBusState *i = SYS_BUS_EHCI(obj);
+ FUSBH200EHCIState *f = FUSBH200_EHCI(obj);
+ EHCIState *s = &i->ehci;
+
+ memory_region_init_io(&f->mem_vendor, &fusbh200_ehci_mmio_ops, s,
+ "fusbh200", 0x4c);
+ memory_region_add_subregion(&s->mem,
+ s->opregbase + s->portscbase + 4 * s->portnr,
+ &f->mem_vendor);
+}
+
+static void fusbh200_ehci_class_init(ObjectClass *oc, void *data)
+{
+ SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc);
+
+ sec->capsbase = 0x0;
+ sec->opregbase = 0x10;
+ sec->portscbase = 0x20;
+ sec->portnr = 1;
+}
+
+static const TypeInfo ehci_fusbh200_type_info = {
+ .name = TYPE_FUSBH200_EHCI,
+ .parent = TYPE_SYS_BUS_EHCI,
+ .instance_size = sizeof(FUSBH200EHCIState),
+ .instance_init = fusbh200_ehci_init,
+ .class_init = fusbh200_ehci_class_init,
+};
+
static void ehci_sysbus_register_types(void)
{
type_register_static(&ehci_type_info);
type_register_static(&ehci_xlnx_type_info);
type_register_static(&ehci_exynos4210_type_info);
type_register_static(&ehci_tegra2_type_info);
+ type_register_static(&ehci_fusbh200_type_info);
}
type_init(ehci_sysbus_register_types)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 1fb9483..15a28e8 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -338,6 +338,7 @@ typedef struct EHCIPCIState {
#define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
#define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
+#define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb"
#define SYS_BUS_EHCI(obj) \
OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI)
@@ -365,4 +366,15 @@ typedef struct SysBusEHCIClass {
uint16_t portnr;
} SysBusEHCIClass;
+#define FUSBH200_EHCI(obj) \
+ OBJECT_CHECK(FUSBH200EHCIState, (obj), TYPE_FUSBH200_EHCI)
+
+typedef struct FUSBH200EHCIState {
+ /*< private >*/
+ EHCISysBusState parent_obj;
+ /*< public >*/
+
+ MemoryRegion mem_vendor;
+} FUSBH200EHCIState;
+
#endif
--
1.7.9.7
next prev parent reply other threads:[~2013-06-24 6:44 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-24 6:44 [Qemu-devel] [PULL 0/9] usb patch queue Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 1/9] usb/hcd-ehci-sysbus: Convert to QOM realize Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 2/9] usb/hcd-ehci: Split off instance_init from realize Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 3/9] usb/hcd-ehci: Add Tegra2 SysBus EHCI device Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 4/9] usb/hcd-ehci: Replace PORTSC macros with variables Gerd Hoffmann
2013-06-24 6:44 ` Gerd Hoffmann [this message]
2013-06-24 6:44 ` [Qemu-devel] [PATCH 6/9] usb/host-libusb: Fix building with libusb git master code Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 7/9] usb-host-libusb: set USB_DEV_FLAG_IS_HOST Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 8/9] usb: add serial bus property Gerd Hoffmann
2013-06-24 6:44 ` [Qemu-devel] [PATCH 9/9] usb: fix serial number for hid devices Gerd Hoffmann
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