From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32809) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UsdOm-0006ze-S1 for qemu-devel@nongnu.org; Fri, 28 Jun 2013 14:27:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UsdOj-0000ZP-NH for qemu-devel@nongnu.org; Fri, 28 Jun 2013 14:27:56 -0400 Received: from mail-ea0-x22a.google.com ([2a00:1450:4013:c01::22a]:63969) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UsdOj-0000Ys-0p for qemu-devel@nongnu.org; Fri, 28 Jun 2013 14:27:53 -0400 Received: by mail-ea0-f170.google.com with SMTP id h10so1236297eaj.1 for ; Fri, 28 Jun 2013 11:27:52 -0700 (PDT) Received: from playground.lan (net-37-116-217-184.cust.dsl.vodafone.it. [37.116.217.184]) by mx.google.com with ESMTPSA id o5sm12035344eef.5.2013.06.28.11.27.50 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 28 Jun 2013 11:27:51 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Fri, 28 Jun 2013 20:26:47 +0200 Message-Id: <1372444009-11544-29-git-send-email-pbonzini@redhat.com> In-Reply-To: <1372444009-11544-1-git-send-email-pbonzini@redhat.com> References: <1372444009-11544-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 28/30] exec: change iotlb APIs to take AddressSpaceDispatch List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This makes it possible to start following RCU rules, which require not dereferencing as->dispatch more than once. It is not covering the whole of TCG, since the TLB data structures are not RCU-friendly, but it is enough for exec.c. Signed-off-by: Paolo Bonzini --- cputlb.c | 7 ++++--- exec.c | 9 +++++---- include/exec/cputlb.h | 9 ++++++--- 3 files changed, 15 insertions(+), 10 deletions(-) diff --git a/cputlb.c b/cputlb.c index 51381ae..82875b1 100644 --- a/cputlb.c +++ b/cputlb.c @@ -253,6 +253,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr, hwaddr paddr, int prot, int mmu_idx, target_ulong size) { + AddressSpaceDispatch *d; MemoryRegionSection *section; unsigned int index; target_ulong address; @@ -267,8 +268,8 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr, } sz = size; - section = address_space_translate_for_iotlb(&address_space_memory, paddr, - &xlat, &sz); + d = address_space_memory.dispatch; + section = address_space_translate_for_iotlb(d, paddr, &xlat, &sz); assert(sz >= TARGET_PAGE_SIZE); #if defined(DEBUG_TLB) @@ -288,7 +289,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr, } code_address = address; - iotlb = memory_region_section_get_iotlb(env, section, vaddr, paddr, xlat, + iotlb = memory_region_section_get_iotlb(d, env, section, vaddr, paddr, xlat, prot, &address); index = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); diff --git a/exec.c b/exec.c index 528c4d7..3e1a576 100644 --- a/exec.c +++ b/exec.c @@ -306,11 +306,11 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, } MemoryRegionSection * -address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, +address_space_translate_for_iotlb(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat, hwaddr *plen) { MemoryRegionSection *section; - section = address_space_translate_internal(as->dispatch, addr, xlat, plen, false); + section = address_space_translate_internal(d, addr, xlat, plen, false); assert(!section->mr->iommu_ops); return section; @@ -726,7 +726,8 @@ static int cpu_physical_memory_set_dirty_tracking(int enable) return ret; } -hwaddr memory_region_section_get_iotlb(CPUArchState *env, +hwaddr memory_region_section_get_iotlb(AddressSpaceDispatch *d, + CPUArchState *env, MemoryRegionSection *section, target_ulong vaddr, hwaddr paddr, hwaddr xlat, @@ -746,7 +747,7 @@ hwaddr memory_region_section_get_iotlb(CPUArchState *env, iotlb |= PHYS_SECTION_ROM; } } else { - iotlb = section - address_space_memory.dispatch->sections; + iotlb = section - d->sections; iotlb += xlat; } diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index e21cb60..968b6a4 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -31,12 +31,15 @@ void tlb_set_dirty(CPUArchState *env, target_ulong vaddr); extern int tlb_flush_count; /* exec.c */ +typedef struct AddressSpaceDispatch AddressSpaceDispatch; + void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr); MemoryRegionSection * -address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, - hwaddr *plen); -hwaddr memory_region_section_get_iotlb(CPUArchState *env, +address_space_translate_for_iotlb(AddressSpaceDispatch *d, hwaddr addr, + hwaddr *xlat, hwaddr *plen); +hwaddr memory_region_section_get_iotlb(AddressSpaceDispatch *d, + CPUArchState *env, MemoryRegionSection *section, target_ulong vaddr, hwaddr paddr, hwaddr xlat, -- 1.8.1.4