From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Utka4-00037U-Hp for qemu-devel@nongnu.org; Mon, 01 Jul 2013 16:20:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Utka0-000159-HL for qemu-devel@nongnu.org; Mon, 01 Jul 2013 16:20:12 -0400 Received: from mail-qe0-x236.google.com ([2607:f8b0:400d:c02::236]:56941) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Utka0-00014t-DT for qemu-devel@nongnu.org; Mon, 01 Jul 2013 16:20:08 -0400 Received: by mail-qe0-f54.google.com with SMTP id ne12so1927928qeb.13 for ; Mon, 01 Jul 2013 13:20:08 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 1 Jul 2013 13:19:30 -0700 Message-Id: <1372709970-29244-3-git-send-email-rth@twiddle.net> In-Reply-To: <1372709970-29244-1-git-send-email-rth@twiddle.net> References: <1372709970-29244-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 2/2] target-alpha: Copy implver to DisasContext List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: afaerber@suse.de Which allows removing env from DisasContext. Signed-off-by: Richard Henderson --- target-alpha/translate.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index b59f919..7dac0c8 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -38,7 +38,6 @@ typedef struct DisasContext DisasContext; struct DisasContext { struct TranslationBlock *tb; - CPUAlphaState *env; uint64_t pc; int mem_idx; @@ -47,6 +46,9 @@ struct DisasContext { /* Current flush-to-zero setting for this TB. */ int tb_ftz; + /* implver value for this CPU. */ + int implver; + bool singlestep_enabled; }; @@ -2246,8 +2248,9 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) break; case 0x6C: /* IMPLVER */ - if (rc != 31) - tcg_gen_movi_i64(cpu_ir[rc], ctx->env->implver); + if (rc != 31) { + tcg_gen_movi_i64(cpu_ir[rc], ctx->implver); + } break; default: goto invalid_opc; @@ -3395,9 +3398,9 @@ static inline void gen_intermediate_code_internal(CPUAlphaState *env, gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; ctx.tb = tb; - ctx.env = env; ctx.pc = pc_start; ctx.mem_idx = cpu_mmu_index(env); + ctx.implver = env->implver; ctx.singlestep_enabled = env->singlestep_enabled; /* ??? Every TB begins with unset rounding mode, to be initialized on -- 1.8.1.4