From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aliguori@us.ibm.com
Subject: [Qemu-devel] [PULL 03/15] tcg-arm: Don't implement rem
Date: Tue, 9 Jul 2013 07:18:23 -0700 [thread overview]
Message-ID: <1373379515-28596-4-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1373379515-28596-1-git-send-email-rth@twiddle.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.c | 14 --------------
tcg/arm/tcg-target.h | 3 +--
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 6be736b..8321f80 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1926,18 +1926,6 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_divu_i32:
tcg_out_udiv(s, COND_AL, args[0], args[1], args[2]);
break;
- case INDEX_op_rem_i32:
- tcg_out_sdiv(s, COND_AL, TCG_REG_TMP, args[1], args[2]);
- tcg_out_mul32(s, COND_AL, TCG_REG_TMP, TCG_REG_TMP, args[2]);
- tcg_out_dat_reg(s, COND_AL, ARITH_SUB, args[0], args[1], TCG_REG_TMP,
- SHIFT_IMM_LSL(0));
- break;
- case INDEX_op_remu_i32:
- tcg_out_udiv(s, COND_AL, TCG_REG_TMP, args[1], args[2]);
- tcg_out_mul32(s, COND_AL, TCG_REG_TMP, TCG_REG_TMP, args[2]);
- tcg_out_dat_reg(s, COND_AL, ARITH_SUB, args[0], args[1], TCG_REG_TMP,
- SHIFT_IMM_LSL(0));
- break;
default:
tcg_abort();
@@ -2043,9 +2031,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
#if TCG_TARGET_HAS_div_i32
{ INDEX_op_div_i32, { "r", "r", "r" } },
- { INDEX_op_rem_i32, { "r", "r", "r" } },
{ INDEX_op_divu_i32, { "r", "r", "r" } },
- { INDEX_op_remu_i32, { "r", "r", "r" } },
#endif
{ -1 },
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 2c5b4e7..263ea03 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -76,11 +76,10 @@ typedef enum {
#ifdef __ARM_ARCH_EXT_IDIV__
#define TCG_TARGET_HAS_div_i32 1
-#define TCG_TARGET_HAS_rem_i32 1
#else
#define TCG_TARGET_HAS_div_i32 0
-#define TCG_TARGET_HAS_rem_i32 0
#endif
+#define TCG_TARGET_HAS_rem_i32 0
extern bool tcg_target_deposit_valid(int ofs, int len);
#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid
--
1.8.1.4
next prev parent reply other threads:[~2013-07-09 14:19 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-09 14:18 [Qemu-devel] [PULL 00/15] tcg: remainder and tcg-arm updates Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 01/15] tcg: Add myself to general TCG maintainership Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 02/15] tcg: Split rem requirement from div requirement Richard Henderson
2013-07-09 14:18 ` Richard Henderson [this message]
2013-07-09 14:18 ` [Qemu-devel] [PULL 04/15] tcg-ppc: Don't implement rem Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 05/15] tcg-ppc64: " Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 06/15] tcg: Allow non-constant control macros Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 07/15] tcg: Simplify logic using TCG_OPF_NOT_PRESENT Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 08/15] tcg-arm: Make use of conditional availability of opcodes for divide Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 09/15] tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 10/15] tcg-arm: Simplify logic in detecting the ARM ISA in use Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 11/15] tcg-arm: Use AT_PLATFORM to detect the host ISA Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 12/15] tcg: Fix high_pc fields in .debug_info Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 13/15] tcg: Move the CIE and FDE header definitions to common code Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 14/15] tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size Richard Henderson
2013-07-09 14:18 ` [Qemu-devel] [PULL 15/15] tcg-arm: Implement tcg_register_jit Richard Henderson
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