From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40982) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1SZh-0008E0-0y for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1SZf-0000tQ-M4 for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:40 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49483 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1SZf-0000tC-1Z for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:43:39 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 23 Jul 2013 04:43:19 +0200 Message-Id: <1374547404-11700-12-git-send-email-afaerber@suse.de> In-Reply-To: <1374547404-11700-1-git-send-email-afaerber@suse.de> References: <1374547404-11700-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 11/16] cpu/a9mpcore: Prepare for QOM embedding List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Paul Brook From: Andreas F=C3=A4rber Signed-off-by: Andreas F=C3=A4rber --- hw/cpu/a9mpcore.c | 24 +----------------------- include/hw/cpu/a9mpcore.h | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 38 insertions(+), 23 deletions(-) create mode 100644 include/hw/cpu/a9mpcore.h diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index 5eb1a2f..d295bfa 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -8,29 +8,7 @@ * This code is licensed under the GPL. */ =20 -#include "hw/sysbus.h" -#include "hw/intc/arm_gic.h" -#include "hw/misc/a9scu.h" -#include "hw/timer/arm_mptimer.h" - -#define TYPE_A9MPCORE_PRIV "a9mpcore_priv" -#define A9MPCORE_PRIV(obj) \ - OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV) - -typedef struct A9MPPrivState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - uint32_t num_cpu; - MemoryRegion container; - uint32_t num_irq; - - GICState gic; - A9SCUState scu; - ARMMPTimerState mptimer; - ARMMPTimerState wdt; -} A9MPPrivState; +#include "hw/cpu/a9mpcore.h" =20 static void a9mp_priv_set_irq(void *opaque, int irq, int level) { diff --git a/include/hw/cpu/a9mpcore.h b/include/hw/cpu/a9mpcore.h new file mode 100644 index 0000000..010489b --- /dev/null +++ b/include/hw/cpu/a9mpcore.h @@ -0,0 +1,37 @@ +/* + * Cortex-A9MPCore internal peripheral emulation. + * + * Copyright (c) 2009 CodeSourcery. + * Copyright (c) 2011 Linaro Limited. + * Written by Paul Brook, Peter Maydell. + * + * This code is licensed under the GPL. + */ +#ifndef HW_CPU_A9MPCORE_H +#define HW_CPU_A9MPCORE_H + +#include "hw/sysbus.h" +#include "hw/intc/arm_gic.h" +#include "hw/misc/a9scu.h" +#include "hw/timer/arm_mptimer.h" + +#define TYPE_A9MPCORE_PRIV "a9mpcore_priv" +#define A9MPCORE_PRIV(obj) \ + OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV) + +typedef struct A9MPPrivState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + + uint32_t num_cpu; + MemoryRegion container; + uint32_t num_irq; + + GICState gic; + A9SCUState scu; + ARMMPTimerState mptimer; + ARMMPTimerState wdt; +} A9MPPrivState; + +#endif --=20 1.8.1.4