From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43588) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sju-0004lB-UX for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1Sjs-0005Hj-Da for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:14 -0400 Received: from cantor2.suse.de ([195.135.220.15]:49776 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Sjs-0005HM-2z for qemu-devel@nongnu.org; Mon, 22 Jul 2013 22:54:12 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Tue, 23 Jul 2013 04:53:41 +0200 Message-Id: <1374548036-14471-10-git-send-email-afaerber@suse.de> In-Reply-To: <1374548036-14471-1-git-send-email-afaerber@suse.de> References: <1374548036-14471-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 09/24] target-alpha: Copy singlestep_enabled to DisasContext List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson From: Richard Henderson Prepare for removing env from DisasContext. Signed-off-by: Richard Henderson Signed-off-by: Andreas F=C3=A4rber --- target-alpha/translate.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 5558b72..6a1aad6 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -46,6 +46,8 @@ struct DisasContext { int tb_rm; /* Current flush-to-zero setting for this TB. */ int tb_ftz; + + bool singlestep_enabled; }; =20 /* Return values from translate_one, indicating the state of the TB. @@ -380,7 +382,7 @@ static int use_goto_tb(DisasContext *ctx, uint64_t de= st) /* Check for the dest on the same page as the start of the TB. We also want to suppress goto_tb in the case of single-steping and I= O. */ return (((ctx->tb->pc ^ dest) & TARGET_PAGE_MASK) =3D=3D 0 - && !ctx->env->singlestep_enabled + && !ctx->singlestep_enabled && !(ctx->tb->cflags & CF_LAST_IO)); } =20 @@ -3401,6 +3403,7 @@ static inline void gen_intermediate_code_internal(A= lphaCPU *cpu, ctx.env =3D env; ctx.pc =3D pc_start; ctx.mem_idx =3D cpu_mmu_index(env); + ctx.singlestep_enabled =3D env->singlestep_enabled; =20 /* ??? Every TB begins with unset rounding mode, to be initialized o= n the first fp insn of the TB. Alternately we could define a prope= r @@ -3457,7 +3460,7 @@ static inline void gen_intermediate_code_internal(A= lphaCPU *cpu, || tcg_ctx.gen_opc_ptr >=3D gen_opc_end || num_insns >=3D max_insns || singlestep - || env->singlestep_enabled)) { + || ctx.singlestep_enabled)) { ret =3D EXIT_PC_STALE; } } while (ret =3D=3D NO_EXIT); @@ -3474,7 +3477,7 @@ static inline void gen_intermediate_code_internal(A= lphaCPU *cpu, tcg_gen_movi_i64(cpu_pc, ctx.pc); /* FALLTHRU */ case EXIT_PC_UPDATED: - if (env->singlestep_enabled) { + if (ctx.singlestep_enabled) { gen_excp_1(EXCP_DEBUG, 0); } else { tcg_gen_exit_tb(0); --=20 1.8.1.4