From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48252) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1Yyd-00080z-OK for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:33:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V1YyW-0000kC-0q for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:33:51 -0400 Received: from mail-we0-f173.google.com ([74.125.82.173]:33964) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V1YyV-0000k2-QZ for qemu-devel@nongnu.org; Tue, 23 Jul 2013 05:33:43 -0400 Received: by mail-we0-f173.google.com with SMTP id x55so2466739wes.32 for ; Tue, 23 Jul 2013 02:33:43 -0700 (PDT) From: "Mian M. Hamayun" Date: Tue, 23 Jul 2013 11:33:14 +0200 Message-Id: <1374571996-9228-6-git-send-email-m.hamayun@virtualopensystems.com> In-Reply-To: <1374571996-9228-1-git-send-email-m.hamayun@virtualopensystems.com> References: <1374571996-9228-1-git-send-email-m.hamayun@virtualopensystems.com> Subject: [Qemu-devel] [PATCH v2 5/7] AARCH64: Disable the non-aarch64 specific reset code List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, tech@virtualopensystems.com, kvmarm@lists.cs.columbia.edu From: "Mian M. Hamayun" This commit disables the co-processor registers reset code for KVM, when compiling for AArch64 cpus. Signed-off-by: Mian M. Hamayun --- target-arm/kvm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-arm/kvm.c b/target-arm/kvm.c index c96b871..5909d75 100644 --- a/target-arm/kvm.c +++ b/target-arm/kvm.c @@ -700,6 +700,7 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) void kvm_arch_reset_vcpu(CPUState *cs) { +#ifndef TARGET_AARCH64 /* Feed the kernel back its initial register state */ ARMCPU *cpu = ARM_CPU(cs); @@ -709,6 +710,7 @@ void kvm_arch_reset_vcpu(CPUState *cs) if (!write_list_to_kvmstate(cpu)) { abort(); } +#endif } bool kvm_arch_stop_on_emulation_error(CPUState *cs) -- 1.7.9.5