From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37552) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V26pS-00036F-B1 for qemu-devel@nongnu.org; Wed, 24 Jul 2013 17:42:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V26pP-0004qn-Nr for qemu-devel@nongnu.org; Wed, 24 Jul 2013 17:42:38 -0400 Received: from cantor2.suse.de ([195.135.220.15]:48460 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V26pP-0004qS-Dq for qemu-devel@nongnu.org; Wed, 24 Jul 2013 17:42:35 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Wed, 24 Jul 2013 23:42:18 +0200 Message-Id: <1374702140-13771-14-git-send-email-afaerber@suse.de> In-Reply-To: <1374702140-13771-1-git-send-email-afaerber@suse.de> References: <1374702140-13771-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-next for-1.6 13/14] xilinx_uartlite: Rename xlx_uartlite to XilinxUARTLite List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Crosthwaite , "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= Signed-off-by: Andreas F=C3=A4rber --- hw/char/xilinx_uartlite.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index feca497..929743c 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -46,8 +46,7 @@ #define CONTROL_RST_RX 0x02 #define CONTROL_IE 0x10 =20 -struct xlx_uartlite -{ +typedef struct XilinxUARTLite { SysBusDevice busdev; MemoryRegion mmio; CharDriverState *chr; @@ -58,9 +57,9 @@ struct xlx_uartlite unsigned int rx_fifo_len; =20 uint32_t regs[R_MAX]; -}; +} XilinxUARTLite; =20 -static void uart_update_irq(struct xlx_uartlite *s) +static void uart_update_irq(XilinxUARTLite *s) { unsigned int irq; =20 @@ -71,7 +70,7 @@ static void uart_update_irq(struct xlx_uartlite *s) qemu_set_irq(s->irq, irq); } =20 -static void uart_update_status(struct xlx_uartlite *s) +static void uart_update_status(XilinxUARTLite *s) { uint32_t r; =20 @@ -86,7 +85,7 @@ static void uart_update_status(struct xlx_uartlite *s) static uint64_t uart_read(void *opaque, hwaddr addr, unsigned int size) { - struct xlx_uartlite *s =3D opaque; + XilinxUARTLite *s =3D opaque; uint32_t r =3D 0; addr >>=3D 2; switch (addr) @@ -113,7 +112,7 @@ static void uart_write(void *opaque, hwaddr addr, uint64_t val64, unsigned int size) { - struct xlx_uartlite *s =3D opaque; + XilinxUARTLite *s =3D opaque; uint32_t value =3D val64; unsigned char ch =3D value; =20 @@ -164,7 +163,7 @@ static const MemoryRegionOps uart_ops =3D { =20 static void uart_rx(void *opaque, const uint8_t *buf, int size) { - struct xlx_uartlite *s =3D opaque; + XilinxUARTLite *s =3D opaque; =20 /* Got a byte. */ if (s->rx_fifo_len >=3D 8) { @@ -182,7 +181,7 @@ static void uart_rx(void *opaque, const uint8_t *buf,= int size) =20 static int uart_can_rx(void *opaque) { - struct xlx_uartlite *s =3D opaque; + XilinxUARTLite *s =3D opaque; =20 return s->rx_fifo_len < sizeof(s->rx_fifo); } @@ -194,7 +193,7 @@ static void uart_event(void *opaque, int event) =20 static int xilinx_uartlite_init(SysBusDevice *dev) { - struct xlx_uartlite *s =3D FROM_SYSBUS(typeof (*s), dev); + XilinxUARTLite *s =3D FROM_SYSBUS(typeof (*s), dev); =20 sysbus_init_irq(dev, &s->irq); =20 @@ -219,7 +218,7 @@ static void xilinx_uartlite_class_init(ObjectClass *k= lass, void *data) static const TypeInfo xilinx_uartlite_info =3D { .name =3D "xlnx.xps-uartlite", .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_size =3D sizeof (struct xlx_uartlite), + .instance_size =3D sizeof(XilinxUARTLite), .class_init =3D xilinx_uartlite_class_init, }; =20 --=20 1.8.1.4