From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48496) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2jW5-0007sx-G9 for qemu-devel@nongnu.org; Fri, 26 Jul 2013 11:01:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V2jW2-00010h-22 for qemu-devel@nongnu.org; Fri, 26 Jul 2013 11:01:13 -0400 Received: from cantor2.suse.de ([195.135.220.15]:33415 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2jW1-00010Q-PW for qemu-devel@nongnu.org; Fri, 26 Jul 2013 11:01:09 -0400 Received: from relay1.suse.de (unknown [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 40BADA52D9 for ; Fri, 26 Jul 2013 17:01:09 +0200 (CEST) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Fri, 26 Jul 2013 17:01:02 +0200 Message-Id: <1374850864-7331-6-git-send-email-afaerber@suse.de> In-Reply-To: <1374850864-7331-1-git-send-email-afaerber@suse.de> References: <1374850864-7331-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH qom-next for-1.6 5/6] sparc32_dma: QOM cast cleanup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Signed-off-by: Andreas F=C3=A4rber --- hw/dma/sparc32_dma.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index be6275f..2a92ffb 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -60,10 +60,14 @@ /* XXX SCSI and ethernet should have different read-only bit masks */ #define DMA_CSR_RO_MASK 0xfe000007 =20 +#define TYPE_SPARC32_DMA "sparc32_dma" +#define SPARC32_DMA(obj) OBJECT_CHECK(DMAState, (obj), TYPE_SPARC32_DMA) + typedef struct DMAState DMAState; =20 struct DMAState { - SysBusDevice busdev; + SysBusDevice parent_obj; + MemoryRegion iomem; uint32_t dmaregs[DMA_REGS]; qemu_irq irq; @@ -249,7 +253,7 @@ static const MemoryRegionOps dma_mem_ops =3D { =20 static void dma_reset(DeviceState *d) { - DMAState *s =3D container_of(d, DMAState, busdev.qdev); + DMAState *s =3D SPARC32_DMA(d); =20 memset(s->dmaregs, 0, DMA_SIZE); s->dmaregs[0] =3D DMA_VER; @@ -266,20 +270,21 @@ static const VMStateDescription vmstate_dma =3D { } }; =20 -static int sparc32_dma_init1(SysBusDevice *dev) +static int sparc32_dma_init1(SysBusDevice *sbd) { - DMAState *s =3D FROM_SYSBUS(DMAState, dev); + DeviceState *dev =3D DEVICE(sbd); + DMAState *s =3D SPARC32_DMA(dev); int reg_size; =20 - sysbus_init_irq(dev, &s->irq); + sysbus_init_irq(sbd, &s->irq); =20 reg_size =3D s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE; memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s, "dma", reg_size); - sysbus_init_mmio(dev, &s->iomem); + sysbus_init_mmio(sbd, &s->iomem); =20 - qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1); - qdev_init_gpio_out(&dev->qdev, s->gpio, 2); + qdev_init_gpio_in(dev, dma_set_irq, 1); + qdev_init_gpio_out(dev, s->gpio, 2); =20 return 0; } @@ -302,7 +307,7 @@ static void sparc32_dma_class_init(ObjectClass *klass= , void *data) } =20 static const TypeInfo sparc32_dma_info =3D { - .name =3D "sparc32_dma", + .name =3D TYPE_SPARC32_DMA, .parent =3D TYPE_SYS_BUS_DEVICE, .instance_size =3D sizeof(DMAState), .class_init =3D sparc32_dma_class_init, --=20 1.8.1.4