From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34261) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2q9U-0000Fo-Sr for qemu-devel@nongnu.org; Fri, 26 Jul 2013 18:06:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V2q9P-0002Gd-6O for qemu-devel@nongnu.org; Fri, 26 Jul 2013 18:06:20 -0400 Received: from cantor2.suse.de ([195.135.220.15]:47404 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2q9O-0002GJ-RO for qemu-devel@nongnu.org; Fri, 26 Jul 2013 18:06:15 -0400 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 27 Jul 2013 00:05:45 +0200 Message-Id: <1374876350-32189-21-git-send-email-afaerber@suse.de> In-Reply-To: <1374876350-32189-1-git-send-email-afaerber@suse.de> References: <1374876350-32189-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 20/25] target-lm32: Move cpu_gdb_{read, write}_register() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Michael Walle , =?UTF-8?q?Andreas=20F=C3=A4rber?= Acked-by: Michael Walle Signed-off-by: Andreas F=C3=A4rber --- gdbstub.c | 66 +-------------------------------------- target-lm32/gdbstub.c | 85 +++++++++++++++++++++++++++++++++++++++++++++= ++++++ 2 files changed, 86 insertions(+), 65 deletions(-) create mode 100644 target-lm32/gdbstub.c diff --git a/gdbstub.c b/gdbstub.c index 58502f3..8a2f80c 100644 --- a/gdbstub.c +++ b/gdbstub.c @@ -578,72 +578,8 @@ static int put_packet(GDBState *s, const char *buf) =20 #elif defined (TARGET_LM32) =20 -#include "hw/lm32/lm32_pic.h" +#include "target-lm32/gdbstub.c" =20 -static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, in= t n) -{ - if (n < 32) { - GET_REG32(env->regs[n]); - } else { - switch (n) { - case 32: - GET_REG32(env->pc); - /* FIXME: put in right exception ID */ - case 33: - GET_REG32(0); - case 34: - GET_REG32(env->eba); - case 35: - GET_REG32(env->deba); - case 36: - GET_REG32(env->ie); - case 37: - GET_REG32(lm32_pic_get_im(env->pic_state)); - case 38: - GET_REG32(lm32_pic_get_ip(env->pic_state)); - } - } - return 0; -} - -static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, i= nt n) -{ - LM32CPU *cpu =3D lm32_env_get_cpu(env); - CPUClass *cc =3D CPU_GET_CLASS(cpu); - uint32_t tmp; - - if (n > cc->gdb_num_core_regs) { - return 0; - } - - tmp =3D ldl_p(mem_buf); - - if (n < 32) { - env->regs[n] =3D tmp; - } else { - switch (n) { - case 32: - env->pc =3D tmp; - break; - case 34: - env->eba =3D tmp; - break; - case 35: - env->deba =3D tmp; - break; - case 36: - env->ie =3D tmp; - break; - case 37: - lm32_pic_set_im(env->pic_state, tmp); - break; - case 38: - lm32_pic_set_ip(env->pic_state, tmp); - break; - } - } - return 4; -} #elif defined(TARGET_XTENSA) =20 static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, = int n) diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c new file mode 100644 index 0000000..732a633 --- /dev/null +++ b/target-lm32/gdbstub.c @@ -0,0 +1,85 @@ +/* + * LM32 gdb server stub + * + * Copyright (c) 2003-2005 Fabrice Bellard + * Copyright (c) 2013 SUSE LINUX Products GmbH + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "hw/lm32/lm32_pic.h" + +static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, in= t n) +{ + if (n < 32) { + GET_REG32(env->regs[n]); + } else { + switch (n) { + case 32: + GET_REG32(env->pc); + /* FIXME: put in right exception ID */ + case 33: + GET_REG32(0); + case 34: + GET_REG32(env->eba); + case 35: + GET_REG32(env->deba); + case 36: + GET_REG32(env->ie); + case 37: + GET_REG32(lm32_pic_get_im(env->pic_state)); + case 38: + GET_REG32(lm32_pic_get_ip(env->pic_state)); + } + } + return 0; +} + +static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, i= nt n) +{ + LM32CPU *cpu =3D lm32_env_get_cpu(env); + CPUClass *cc =3D CPU_GET_CLASS(cpu); + uint32_t tmp; + + if (n > cc->gdb_num_core_regs) { + return 0; + } + + tmp =3D ldl_p(mem_buf); + + if (n < 32) { + env->regs[n] =3D tmp; + } else { + switch (n) { + case 32: + env->pc =3D tmp; + break; + case 34: + env->eba =3D tmp; + break; + case 35: + env->deba =3D tmp; + break; + case 36: + env->ie =3D tmp; + break; + case 37: + lm32_pic_set_im(env->pic_state, tmp); + break; + case 38: + lm32_pic_set_ip(env->pic_state, tmp); + break; + } + } + return 4; +} --=20 1.8.1.4