From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34345) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V9qWi-0005i1-5p for qemu-devel@nongnu.org; Thu, 15 Aug 2013 01:55:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V9qWd-0004P9-BL for qemu-devel@nongnu.org; Thu, 15 Aug 2013 01:55:16 -0400 Message-ID: <1376546096.4255.92.camel@pasglop> From: Benjamin Herrenschmidt Date: Thu, 15 Aug 2013 15:54:56 +1000 In-Reply-To: <283AA2CE-F23C-4218-B28A-3779D6BA549B@suse.de> References: <1376537732-29300-1-git-send-email-aik@ozlabs.ru> <283AA2CE-F23C-4218-B28A-3779D6BA549B@suse.de> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC PATCH] powerpc: add PVR mask support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Alexey Kardashevskiy , "qemu-ppc@nongnu.org" , Paul Mackerras , "qemu-devel@nongnu.org" , Andreas =?ISO-8859-1?Q?F=E4rber?= On Thu, 2013-08-15 at 07:21 +0200, Alexander Graf wrote: >=20 > Am 15.08.2013 um 05:35 schrieb Alexey Kardashevskiy : >=20 > > IBM POWERPC processors encode PVR as a CPU family in higher 16 bits a= nd > > a CPU version in lower 16 bits. Since there is no significant change > > in behavior between versions, there is no point to add every single C= PU > > version in QEMU's CPU list. Also, new CPU versions of already support= ed > > CPU won't break the existing code. > >=20 > > This adds a PVR mask support. POWER7, POWER7+ and POWER8 CPUs > > definitions converted to use masks. >=20 > How does the user select that he wants a v2.3 p7 cpu with this patch? It's a tradeoff. We are trading a useless feature (which you describe above) for a functional system that doesn't require to have an entry for every possible chip revision ever designed and to be designed in the future for things to work. I know the qemu folks is generally uninterested in making things actually work but heh .. :-) Cheers, Ben. > Alex >=20 > >=20 > > Cc: Andreas F=C3=A4rber > > Signed-off-by: Alexey Kardashevskiy > > --- > >=20 > > The patch does basically what the kernel does in arch/powerpc/kernel/= cputable.c. > >=20 > > --- > > target-ppc/cpu-models.c | 26 +++++++++++++++----------- > > target-ppc/cpu-models.h | 12 +++++++----- > > target-ppc/cpu-qom.h | 1 + > > target-ppc/translate_init.c | 2 +- > > 4 files changed, 24 insertions(+), 17 deletions(-) > >=20 > > diff --git a/target-ppc/cpu-models.c b/target-ppc/cpu-models.c > > index 8dea560..c40cf04 100644 > > --- a/target-ppc/cpu-models.c > > +++ b/target-ppc/cpu-models.c > > @@ -35,7 +35,7 @@ > > /* PowerPC CPU definitions = */ > > #define POWERPC_DEF_PREFIX(pvr, svr, type) = \ > > glue(glue(glue(glue(pvr, _), svr), _), type) > > -#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type) = \ > > +#define POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask, _svr, _t= ype) \ > > static void = \ > > glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init) = \ > > (ObjectClass *oc, void *data) = \ > > @@ -44,6 +44,7 @@ > > PowerPCCPUClass *pcc =3D POWERPC_CPU_CLASS(oc); = \ > > = \ > > pcc->pvr =3D _pvr; = \ > > + pcc->pvr_mask =3D _pvr_mask; = \ > > pcc->svr =3D _svr; = \ > > dc->desc =3D _desc; = \ > > } = \ > > @@ -66,9 +67,16 @@ > > type_init( = \ > > glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_register_typ= es)) > >=20 > > +#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type) = \ > > + POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, CPU_POWERPC_DEFAULT_MAS= K, \ > > + _svr, _type) > > + > > #define POWERPC_DEF(_name, _pvr, _type, _desc) = \ > > POWERPC_DEF_SVR(_name, _desc, _pvr, POWERPC_SVR_NONE, _type) > >=20 > > +#define POWERPC_DEF_MASK(_name, _pvr, _pvr_mask, _type, _desc) = \ > > + POWERPC_DEF_SVR_MASK(_name, _desc, _pvr, _pvr_mask, POWERPC_SVR_= NONE, _type) > > + > > /* Embedded PowerPC = */ > > /* PowerPC 401 family = */ > > POWERPC_DEF("401", CPU_POWERPC_401, = 401, > > @@ -1133,16 +1141,12 @@ > > POWERPC_DEF("POWER6A", CPU_POWERPC_POWER6A, = POWER6, > > "POWER6A") > > #endif > > - POWERPC_DEF("POWER7_v2.0", CPU_POWERPC_POWER7_v20, = POWER7, > > - "POWER7 v2.0") > > - POWERPC_DEF("POWER7_v2.1", CPU_POWERPC_POWER7_v21, = POWER7, > > - "POWER7 v2.1") > > - POWERPC_DEF("POWER7_v2.3", CPU_POWERPC_POWER7_v23, = POWER7, > > - "POWER7 v2.3") > > - POWERPC_DEF("POWER7+_v2.1", CPU_POWERPC_POWER7P_v21, = POWER7, > > - "POWER7+ v2.1") > > - POWERPC_DEF("POWER8_v1.0", CPU_POWERPC_POWER8_v10, = POWER8, > > - "POWER8 v1.0") > > + POWERPC_DEF_MASK("POWER7", CPU_POWERPC_POWER7, CPU_POWERPC_POWER= 7_MASK, > > + POWER7, "POWER7") > > + POWERPC_DEF_MASK("POWER7+", CPU_POWERPC_POWER7P, CPU_POWERPC_POW= ER7P_MASK, > > + POWER7, "POWER7") > > + POWERPC_DEF_MASK("POWER8", CPU_POWERPC_POWER8, CPU_POWERPC_POWER= 8_MASK, > > + POWER8, "POWER8") > > POWERPC_DEF("970", CPU_POWERPC_970, = 970, > > "PowerPC 970") > > POWERPC_DEF("970fx_v1.0", CPU_POWERPC_970FX_v10, = 970FX, > > diff --git a/target-ppc/cpu-models.h b/target-ppc/cpu-models.h > > index d9145d1..b322063 100644 > > --- a/target-ppc/cpu-models.h > > +++ b/target-ppc/cpu-models.h > > @@ -39,6 +39,7 @@ extern PowerPCCPUAlias ppc_cpu_aliases[]; > > /********************************************************************= *********/ > > /* PVR definitions for most known PowerPC = */ > > enum { > > + CPU_POWERPC_DEFAULT_MASK =3D 0xFFFFFFFF, > > /* PowerPC 401 family */ > > /* Generic PowerPC 401 */ > > #define CPU_POWERPC_401 CPU_POWERPC_401G2 > > @@ -552,11 +553,12 @@ enum { > > CPU_POWERPC_POWER6 =3D 0x003E0000, > > CPU_POWERPC_POWER6_5 =3D 0x0F000001, /* POWER6 in POWER= 5 mode */ > > CPU_POWERPC_POWER6A =3D 0x0F000002, > > - CPU_POWERPC_POWER7_v20 =3D 0x003F0200, > > - CPU_POWERPC_POWER7_v21 =3D 0x003F0201, > > - CPU_POWERPC_POWER7_v23 =3D 0x003F0203, > > - CPU_POWERPC_POWER7P_v21 =3D 0x004A0201, > > - CPU_POWERPC_POWER8_v10 =3D 0x004B0100, > > + CPU_POWERPC_POWER7 =3D 0x003F0000, > > + CPU_POWERPC_POWER7_MASK =3D 0xFFFF0000, > > + CPU_POWERPC_POWER7P =3D 0x004A0000, > > + CPU_POWERPC_POWER7P_MASK =3D 0xFFFF0000, > > + CPU_POWERPC_POWER8 =3D 0x004B0000, > > + CPU_POWERPC_POWER8_MASK =3D 0xFFFF0000, > > CPU_POWERPC_970 =3D 0x00390202, > > CPU_POWERPC_970FX_v10 =3D 0x00391100, > > CPU_POWERPC_970FX_v20 =3D 0x003C0200, > > diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h > > index f3c710a..0ae8b09 100644 > > --- a/target-ppc/cpu-qom.h > > +++ b/target-ppc/cpu-qom.h > > @@ -54,6 +54,7 @@ typedef struct PowerPCCPUClass { > > void (*parent_reset)(CPUState *cpu); > >=20 > > uint32_t pvr; > > + uint32_t pvr_mask; > > uint32_t svr; > > uint64_t insns_flags; > > uint64_t insns_flags2; > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.= c > > index 13b290c..01dffa6 100644 > > --- a/target-ppc/translate_init.c > > +++ b/target-ppc/translate_init.c > > @@ -8161,7 +8161,7 @@ static gint ppc_cpu_compare_class_pvr(gconstpoi= nter a, gconstpointer b) > > } > > #endif > >=20 > > - return pcc->pvr =3D=3D pvr ? 0 : -1; > > + return pcc->pvr =3D=3D (pvr & pcc->pvr_mask) ? 0 : -1; > > } > >=20 > > PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr) > > --=20 > > 1.8.3.2 > >=20