From: Jia Liu <proljc@gmail.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, aliguori@us.ibm.com, xi.wang@gmail.com
Subject: [Qemu-devel] [PULL 3/3] hw/openrisc: Avoid undefined shift in openrisc_pic_cpu_handler()
Date: Wed, 21 Aug 2013 10:06:51 +0800 [thread overview]
Message-ID: <1377050811-11116-4-git-send-email-proljc@gmail.com> (raw)
In-Reply-To: <1377050811-11116-1-git-send-email-proljc@gmail.com>
In C99 signed shift (1 << 31) is undefined behavior, since the result
exceeds INT_MAX. Use 1U instead and move the shift after the check.
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
---
hw/openrisc/pic_cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c
index 3fcee02..2af1d60 100644
--- a/hw/openrisc/pic_cpu.c
+++ b/hw/openrisc/pic_cpu.c
@@ -26,12 +26,14 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level)
{
OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
CPUState *cs = CPU(cpu);
- uint32_t irq_bit = 1 << irq;
+ uint32_t irq_bit;
if (irq > 31 || irq < 0) {
return;
}
+ irq_bit = 1U << irq;
+
if (level) {
cpu->env.picsr |= irq_bit;
} else {
--
1.7.12.4 (Apple Git-37)
next prev parent reply other threads:[~2013-08-21 2:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-21 2:06 [Qemu-devel] [PULL 0/3] OpenRISC patch queue for 1.7 Jia Liu
2013-08-21 2:06 ` [Qemu-devel] [PULL 1/3] hw/openrisc: Avoid using uninitialised variable 'entry' Jia Liu
2013-08-21 2:06 ` [Qemu-devel] [PULL 2/3] hw/openrisc: Fix masking in openrisc_pic_cpu_handler() Jia Liu
2013-08-21 2:06 ` Jia Liu [this message]
2013-08-23 14:09 ` [Qemu-devel] [PULL 0/3] OpenRISC patch queue for 1.7 Peter Maydell
2013-08-26 6:00 ` Jia Liu
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