From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60284) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VBxpm-0003jn-Uu for qemu-devel@nongnu.org; Tue, 20 Aug 2013 22:07:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VBxpe-0007xI-Ev for qemu-devel@nongnu.org; Tue, 20 Aug 2013 22:07:42 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:47952) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VBxpe-0007xB-9a for qemu-devel@nongnu.org; Tue, 20 Aug 2013 22:07:34 -0400 Received: by mail-pa0-f50.google.com with SMTP id fb10so209114pad.9 for ; Tue, 20 Aug 2013 19:07:33 -0700 (PDT) From: Jia Liu Date: Wed, 21 Aug 2013 10:06:51 +0800 Message-Id: <1377050811-11116-4-git-send-email-proljc@gmail.com> In-Reply-To: <1377050811-11116-1-git-send-email-proljc@gmail.com> References: <1377050811-11116-1-git-send-email-proljc@gmail.com> Content-Type: text/plain; charset="utf-8" Subject: [Qemu-devel] [PULL 3/3] hw/openrisc: Avoid undefined shift in openrisc_pic_cpu_handler() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, aliguori@us.ibm.com, xi.wang@gmail.com In C99 signed shift (1 << 31) is undefined behavior, since the result exceeds INT_MAX. Use 1U instead and move the shift after the check. Signed-off-by: Xi Wang Acked-by: Jia Liu --- hw/openrisc/pic_cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c index 3fcee02..2af1d60 100644 --- a/hw/openrisc/pic_cpu.c +++ b/hw/openrisc/pic_cpu.c @@ -26,12 +26,14 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) { OpenRISCCPU *cpu = (OpenRISCCPU *)opaque; CPUState *cs = CPU(cpu); - uint32_t irq_bit = 1 << irq; + uint32_t irq_bit; if (irq > 31 || irq < 0) { return; } + irq_bit = 1U << irq; + if (level) { cpu->env.picsr |= irq_bit; } else { -- 1.7.12.4 (Apple Git-37)