From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEeh8-0006wz-5E for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VEeh1-0003am-J7 for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:54 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:33011) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VEeh1-0003ag-Bd for qemu-devel@nongnu.org; Wed, 28 Aug 2013 08:17:47 -0400 From: Aurelien Jarno Date: Wed, 28 Aug 2013 14:17:39 +0200 Message-Id: <1377692259-19959-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH] pcnet-pci: mark I/O and MMIO as LITTLE_ENDIAN List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , qemu-stable@nongnu.org, Aurelien Jarno Now that the memory subsystem is propagating the endianness correctly, the pcnet-pci device should have its I/O ports and MMIO memory marked as LITTLE_ENDIAN, as PCI devices are little endian. This makes the pcnet-pci NIC to work again on big endian MIPS Malta (default NIC). Cc: qemu-stable@nongnu.org Signed-off-by: Aurelien Jarno --- hw/net/pcnet-pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index a893165..865f2f0 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr, static const MemoryRegionOps pcnet_io_ops = { .read = pcnet_ioport_read, .write = pcnet_ioport_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val) @@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = { .read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl }, .write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel }, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pci_physical_memory_write(void *dma_opaque, hwaddr addr, -- 1.7.10.4