From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60486) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGAKM-0000Hq-0l for qemu-devel@nongnu.org; Sun, 01 Sep 2013 12:16:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VGAKF-0006xN-Tk for qemu-devel@nongnu.org; Sun, 01 Sep 2013 12:16:37 -0400 Received: from mail-pa0-x22e.google.com ([2607:f8b0:400e:c03::22e]:55866) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGAKF-0006xI-M2 for qemu-devel@nongnu.org; Sun, 01 Sep 2013 12:16:31 -0400 Received: by mail-pa0-f46.google.com with SMTP id fa1so4230561pad.5 for ; Sun, 01 Sep 2013 09:16:30 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sun, 1 Sep 2013 09:16:08 -0700 Message-Id: <1378052173-3579-10-git-send-email-rth@twiddle.net> In-Reply-To: <1378052173-3579-1-git-send-email-rth@twiddle.net> References: <1378052173-3579-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 09/14] tcg-ppc64: Tidy register allocation order List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Vassili Karpov (malc)" , aurelien@aurel32.net, Richard Henderson Remove conditionalization from tcg_target_reg_alloc_order, relying on reserved_regs to prevent register allocation that shouldn't happen. So R11 is now present in reg_alloc_order for __APPLE__, but also now reserved. Sort reg_alloc_order into call-saved, call-clobbered, and parameters. This reduces the effect of values getting spilled and reloaded before function calls. Whether or not it is reserved, R2 (TOC) is always call-clobbered. Signed-off-by: Richard Henderson --- tcg/ppc64/tcg-target.c | 49 ++++++++++++++++++++++--------------------------- 1 file changed, 22 insertions(+), 27 deletions(-) diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 95980ce..d567d9a 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -99,7 +99,7 @@ static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { #endif static const int tcg_target_reg_alloc_order[] = { - TCG_REG_R14, + TCG_REG_R14, /* call saved registers */ TCG_REG_R15, TCG_REG_R16, TCG_REG_R17, @@ -109,29 +109,25 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_R21, TCG_REG_R22, TCG_REG_R23, + TCG_REG_R24, + TCG_REG_R25, + TCG_REG_R26, + TCG_REG_R27, TCG_REG_R28, TCG_REG_R29, TCG_REG_R30, TCG_REG_R31, -#ifdef __APPLE__ + TCG_REG_R12, /* call clobbered, non-arguments */ + TCG_REG_R11, TCG_REG_R2, -#endif - TCG_REG_R3, - TCG_REG_R4, - TCG_REG_R5, - TCG_REG_R6, - TCG_REG_R7, - TCG_REG_R8, + TCG_REG_R10, /* call clobbered, arguments */ TCG_REG_R9, - TCG_REG_R10, -#ifndef __APPLE__ - TCG_REG_R11, -#endif - TCG_REG_R12, - TCG_REG_R24, - TCG_REG_R25, - TCG_REG_R26, - TCG_REG_R27 + TCG_REG_R8, + TCG_REG_R7, + TCG_REG_R6, + TCG_REG_R5, + TCG_REG_R4, + TCG_REG_R3, }; static const int tcg_target_call_iarg_regs[] = { @@ -2151,9 +2147,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff); tcg_regset_set32(tcg_target_call_clobber_regs, 0, (1 << TCG_REG_R0) | -#ifdef __APPLE__ (1 << TCG_REG_R2) | -#endif (1 << TCG_REG_R3) | (1 << TCG_REG_R4) | (1 << TCG_REG_R5) | @@ -2163,16 +2157,17 @@ static void tcg_target_init(TCGContext *s) (1 << TCG_REG_R9) | (1 << TCG_REG_R10) | (1 << TCG_REG_R11) | - (1 << TCG_REG_R12) - ); + (1 << TCG_REG_R12)); tcg_regset_clear(s->reserved_regs); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); -#ifndef __APPLE__ - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R0); /* tcg temp */ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R1); /* stack pointer */ +#ifdef __APPLE__ + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R11); /* ??? */ +#else + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R2); /* toc */ #endif - tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); + tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13); /* thread pointer */ tcg_add_target_add_op_defs(ppc_op_defs); } -- 1.8.3.1