From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34891) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VGz5W-00083W-75 for qemu-devel@nongnu.org; Tue, 03 Sep 2013 18:28:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VGz5Q-0005fk-Kp for qemu-devel@nongnu.org; Tue, 03 Sep 2013 18:28:42 -0400 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Wed, 4 Sep 2013 00:29:10 +0200 Message-Id: <1378247351-8446-11-git-send-email-hpoussin@reactos.org> In-Reply-To: <1378247351-8446-1-git-send-email-hpoussin@reactos.org> References: <1378247351-8446-1-git-send-email-hpoussin@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v2 10/10] raven: use raven_ for all function prefixes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?=20Andreas=20F=C3=A4rber?= , qemu-ppc@nongnu.org Signed-off-by: Herv=C3=A9 Poussineau --- hw/pci-host/prep.c | 40 +++++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 19 deletions(-) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 38df10c..0de835a 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -69,7 +69,7 @@ typedef struct PRePPCIState { =20 #define BIOS_SIZE (1024 * 1024) =20 -static inline uint32_t PPC_PCIIO_config(hwaddr addr) +static inline uint32_t raven_pci_io_config(hwaddr addr) { int i; =20 @@ -81,36 +81,36 @@ static inline uint32_t PPC_PCIIO_config(hwaddr addr) return (addr & 0x7ff) | (i << 11); } =20 -static void ppc_pci_io_write(void *opaque, hwaddr addr, - uint64_t val, unsigned int size) +static void raven_pci_io_write(void *opaque, hwaddr addr, + uint64_t val, unsigned int size) { PREPPCIState *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); - pci_data_write(phb->bus, PPC_PCIIO_config(addr), val, size); + pci_data_write(phb->bus, raven_pci_io_config(addr), val, size); } =20 -static uint64_t ppc_pci_io_read(void *opaque, hwaddr addr, - unsigned int size) +static uint64_t raven_pci_io_read(void *opaque, hwaddr addr, + unsigned int size) { PREPPCIState *s =3D opaque; PCIHostState *phb =3D PCI_HOST_BRIDGE(s); - return pci_data_read(phb->bus, PPC_PCIIO_config(addr), size); + return pci_data_read(phb->bus, raven_pci_io_config(addr), size); } =20 -static const MemoryRegionOps PPC_PCIIO_ops =3D { - .read =3D ppc_pci_io_read, - .write =3D ppc_pci_io_write, +static const MemoryRegionOps raven_pci_io_ops =3D { + .read =3D raven_pci_io_read, + .write =3D raven_pci_io_write, .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 -static uint64_t ppc_intack_read(void *opaque, hwaddr addr, - unsigned int size) +static uint64_t raven_intack_read(void *opaque, hwaddr addr, + unsigned int size) { return pic_read_irq(isa_pic); } =20 -static const MemoryRegionOps PPC_intack_ops =3D { - .read =3D ppc_intack_read, +static const MemoryRegionOps raven_intack_ops =3D { + .read =3D raven_intack_read, .valid =3D { .max_access_size =3D 1, }, @@ -181,12 +181,12 @@ static const MemoryRegionOps raven_io_ops =3D { .valid.unaligned =3D true, }; =20 -static int prep_map_irq(PCIDevice *pci_dev, int irq_num) +static int raven_map_irq(PCIDevice *pci_dev, int irq_num) { return (irq_num + (pci_dev->devfn >> 3)) & 1; } =20 -static void prep_set_irq(void *opaque, int irq_num, int level) +static void raven_set_irq(void *opaque, int irq_num, int level) { qemu_irq *pic =3D opaque; =20 @@ -220,7 +220,8 @@ static void raven_pcihost_realizefn(DeviceState *d, E= rror **errp) =20 qdev_init_gpio_in(d, raven_change_gpio, 1); =20 - pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, PCI_NU= M_PINS); + pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq, + PCI_NUM_PINS); =20 memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops= , s, "pci-conf-idx", 4); @@ -230,10 +231,11 @@ static void raven_pcihost_realizefn(DeviceState *d,= Error **errp) "pci-conf-data", 4); memory_region_add_subregion(&s->pci_io, 0xcfc, &h->data_mem); =20 - memory_region_init_io(&h->mmcfg, OBJECT(s), &PPC_PCIIO_ops, s, "pcii= o", 0x00400000); + memory_region_init_io(&h->mmcfg, OBJECT(s), &raven_pci_io_ops, s, + "pciio", 0x00400000); memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg= ); =20 - memory_region_init_io(&s->pci_intack, OBJECT(s), &PPC_intack_ops, s, + memory_region_init_io(&s->pci_intack, OBJECT(s), &raven_intack_ops, = s, "pci-intack", 1); memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_i= ntack); =20 --=20 1.7.10.4