From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48041) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHAbl-0000aj-8w for qemu-devel@nongnu.org; Wed, 04 Sep 2013 06:46:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VHAbf-0006TL-8H for qemu-devel@nongnu.org; Wed, 04 Sep 2013 06:46:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:8197) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHAbf-0006TF-0V for qemu-devel@nongnu.org; Wed, 04 Sep 2013 06:46:39 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r84AkcFW030302 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 4 Sep 2013 06:46:38 -0400 Date: Wed, 4 Sep 2013 13:48:40 +0300 From: "Michael S. Tsirkin" Message-ID: <1378291667-8516-6-git-send-email-mst@redhat.com> References: <1378291667-8516-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1378291667-8516-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PATCH 5/6] q35: use 64 bit window programmed by guest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: imammedo@redhat.com Detect the 64 bit window programmed by firmware and configure properties accordingly. Signed-off-by: Michael S. Tsirkin --- hw/pci-host/q35.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 3f1d447..5cb1e8a 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -90,6 +90,9 @@ static void q35_host_get_pci_hole64_start(Object *obj, Visitor *v, Error **errp) { Q35PCIHost *s = Q35_HOST_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); + + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64); visit_type_uint64(v, &s->mch.pci_info.w64.begin, name, errp); } @@ -99,6 +102,9 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v, Error **errp) { Q35PCIHost *s = Q35_HOST_DEVICE(obj); + PCIHostState *h = PCI_HOST_BRIDGE(obj); + + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64); visit_type_uint64(v, &s->mch.pci_info.w64.end, name, errp); } -- MST