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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Date: Thu, 05 Sep 2013 23:37:32 +1000
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Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH 16/16] target-ppc: Convert to
	new ldst opcodes
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To: Alexander Graf <agraf@suse.de>
Cc: "qemu-ppc@nongnu.org list:PowerPC" <qemu-ppc@nongnu.org>, "qemu-devel@nongnu.org qemu-devel" <qemu-devel@nongnu.org>, Richard Henderson <rth@twiddle.net>

On Thu, 2013-09-05 at 14:59 +0200, Alexander Graf wrote:

> > The embedded PPCs have simply a per-page E bit in the TLB
> controlling
> > the endianness of accesses through the translation, the endianness
> is
> > "clean" in that case, and the bus doesn't flip around so it's akin
> to
> > what P7 does but with a finer granularity.
> 
> So on P7 basically everything that goes from registers out is
> byte-swapped, including any RAM access and MMIOs? I think that's
> basically what the current little endian mode implements (though it
> might miss a few places, like FPU or Altivec, but I'd consider that
> bugs).

Yes. There are some oddities with VSX though (it does PDP endian iirc).

Cheers,
Ben.