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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PATCH 05/19] tcg-ia64: Move AREG0 to R32
Date: Thu,  5 Sep 2013 23:50:27 -0700	[thread overview]
Message-ID: <1378450242-27080-6-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1378450242-27080-1-git-send-email-rth@twiddle.net>

Since the move away from the global areg0, we're no longer globally
reserving areg0.  Which means our use of R7 clobbers a call-saved
register.  Shift areg0 into the windowed registers.  Indeed, choose
the incoming parameter register that it comes to us by.

This requires moving the register holding the return address elsewhere.
Choose R33 for tidiness.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/ia64/tcg-target.c | 13 ++++++-------
 tcg/ia64/tcg-target.h |  4 ++--
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 413e00f..ad5a6b9 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -107,7 +107,6 @@ enum {
 };
 
 static const int tcg_target_reg_alloc_order[] = {
-    TCG_REG_R33,
     TCG_REG_R35,
     TCG_REG_R36,
     TCG_REG_R37,
@@ -2402,8 +2401,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
     tcg_out_bundle(s, miI,
                    tcg_opc_m34(TCG_REG_P0, OPC_ALLOC_M34,
                                TCG_REG_R34, 32, 24, 0),
-                   tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,
-                               TCG_AREG0, 0, TCG_REG_R32),
+                   INSN_NOP_I,
                    tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
                                TCG_REG_B6, TCG_REG_R33, 0));
 
@@ -2422,7 +2420,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
                    tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,
                                TCG_REG_R12, -frame_size, TCG_REG_R12),
                    tcg_opc_i22(TCG_REG_P0, OPC_MOV_I22,
-                               TCG_REG_R32, TCG_REG_B0),
+                               TCG_REG_R33, TCG_REG_B0),
                    tcg_opc_b4 (TCG_REG_P0, OPC_BR_SPTK_MANY_B4, TCG_REG_B6));
 
     /* epilogue */
@@ -2430,7 +2428,7 @@ static void tcg_target_qemu_prologue(TCGContext *s)
     tcg_out_bundle(s, miI,
                    INSN_NOP_M,
                    tcg_opc_i21(TCG_REG_P0, OPC_MOV_I21,
-                               TCG_REG_B0, TCG_REG_R32, 0),
+                               TCG_REG_B0, TCG_REG_R33, 0),
                    tcg_opc_a4 (TCG_REG_P0, OPC_ADDS_A4,
                                TCG_REG_R12, frame_size, TCG_REG_R12));
     tcg_out_bundle(s, miB,
@@ -2487,16 +2485,17 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R3);   /* internal use */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R12);  /* stack pointer */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R13);  /* thread pointer */
-    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R32);  /* return address */
+    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R33);  /* return address */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R34);  /* PFS */
 
-    /* The following 3 are not in use, are call-saved, but *not* saved
+    /* The following 4 are not in use, are call-saved, but *not* saved
        by the prologue.  Therefore we cannot use them without modifying
        the prologue.  There doesn't seem to be any good reason to use
        these as opposed to the windowed registers.  */
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R4);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R5);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6);
+    tcg_regset_set_reg(s->reserved_regs, TCG_REG_R7);
 
     tcg_add_target_add_op_defs(ia64_op_defs);
 }
diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h
index 9fe3bf6..65897f2 100644
--- a/tcg/ia64/tcg-target.h
+++ b/tcg/ia64/tcg-target.h
@@ -94,6 +94,8 @@ typedef enum {
     TCG_REG_R61,
     TCG_REG_R62,
     TCG_REG_R63,
+
+    TCG_AREG0 = TCG_REG_R32,
 } TCGReg;
 
 #define TCG_CT_CONST_ZERO 0x100
@@ -164,8 +166,6 @@ typedef enum {
 #define TCG_TARGET_HAS_not_i32          0 /* xor r1, -1, r3 */
 #define TCG_TARGET_HAS_not_i64          0 /* xor r1, -1, r3 */
 
-#define TCG_AREG0 TCG_REG_R7
-
 static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
 {
     start = start & ~(32UL - 1UL);
-- 
1.8.3.1

  parent reply	other threads:[~2013-09-06  6:51 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-09-06  6:50 [Qemu-devel] [PATCH 00/19] tcg-ia64 fixes and improvements Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 01/19] tcg-ia64: Use TCGMemOp within qemu_ldst routines Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 02/19] tcg-ia64: Use shortcuts for nop insns Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 03/19] tcg-ia64: Handle constant calls Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 04/19] tcg-ia64: Simplify brcond Richard Henderson
2013-09-06  6:50 ` Richard Henderson [this message]
2013-09-06  6:50 ` [Qemu-devel] [PATCH 06/19] tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 07/19] tcg-ia64: Use ADDS for small addition Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 08/19] tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 09/19] tcg-ia64: Use A3 form of logical operations Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 10/19] tcg-ia64 Introduce tcg_opc_mov_a Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 11/19] tcg-ia64 Introduce tcg_opc_movi_a Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 12/19] tcg-ia64 Introduce tcg_opc_ext_i Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 13/19] tcg-ia64 Introduce tcg_opc_bswap64_i Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 14/19] tcg-ia64: Re-bundle the tlb load Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 15/19] tcg-ia64: Move bswap for store into " Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 16/19] tcg-ia64: Move tlb addend load into tlb read Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 17/19] tcg-i64: Reduce code duplication in tcg_out_qemu_ld Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 18/19] tcg-ia64: Convert to new ldst helpers Richard Henderson
2013-09-06  6:50 ` [Qemu-devel] [PATCH 19/19] tcg-ia64: Move part of softmmu slow path out of line Richard Henderson

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