From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48345) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHr8U-0000RW-PA for qemu-devel@nongnu.org; Fri, 06 Sep 2013 04:11:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VHr8M-0004rV-HI for qemu-devel@nongnu.org; Fri, 06 Sep 2013 04:11:22 -0400 Received: from e23smtp05.au.ibm.com ([202.81.31.147]:35264) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VHr8L-0004r5-UG for qemu-devel@nongnu.org; Fri, 06 Sep 2013 04:11:14 -0400 Received: from /spool/local by e23smtp05.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 6 Sep 2013 18:03:34 +1000 From: Alexey Kardashevskiy Date: Fri, 6 Sep 2013 18:10:53 +1000 Message-Id: <1378455053-18219-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH v2] spapr-rtas: use softmmu for accessing rtas call parameters List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Paul Mackerras , Alexander Graf On the real hardware, RTAS is called in real mode and therefore ignores top 4 bits of the address passed in the call. This fixes QEMU to use softmmu which can chop top 4 bits if MSR DR is not set. Signed-off-by: Alexey Kardashevskiy --- Changes: v2: * masking from replaced with the use of cpu_ldl_data which can handle realmode case properly --- hw/ppc/spapr_hcall.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 063bd36..30f90bf 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -4,6 +4,7 @@ #include "hw/ppc/spapr.h" #include "mmu-hash64.h" #include "cpu-models.h" +#include "exec/softmmu_exec.h" #include @@ -523,10 +524,11 @@ static target_ulong h_cede(PowerPCCPU *cpu, sPAPREnvironment *spapr, static target_ulong h_rtas(PowerPCCPU *cpu, sPAPREnvironment *spapr, target_ulong opcode, target_ulong *args) { + CPUPPCState *env = &cpu->env; target_ulong rtas_r3 = args[0]; - uint32_t token = ldl_be_phys(rtas_r3); - uint32_t nargs = ldl_be_phys(rtas_r3 + 4); - uint32_t nret = ldl_be_phys(rtas_r3 + 8); + uint32_t token = cpu_ldl_data(env, rtas_r3); + uint32_t nargs = cpu_ldl_data(env, rtas_r3 + 4); + uint32_t nret = cpu_ldl_data(env, rtas_r3 + 8); return spapr_rtas_call(cpu, spapr, token, nargs, rtas_r3 + 12, nret, rtas_r3 + 12 + 4*nargs); -- 1.8.4.rc4