From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56431) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJBox-0002I1-K2 for qemu-devel@nongnu.org; Mon, 09 Sep 2013 20:28:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJBor-0005n0-L6 for qemu-devel@nongnu.org; Mon, 09 Sep 2013 20:28:43 -0400 Received: from mail-pb0-x22e.google.com ([2607:f8b0:400e:c01::22e]:34467) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJBor-0005mt-Dx for qemu-devel@nongnu.org; Mon, 09 Sep 2013 20:28:37 -0400 Received: by mail-pb0-f46.google.com with SMTP id rq2so6767635pbb.5 for ; Mon, 09 Sep 2013 17:28:36 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 9 Sep 2013 17:28:21 -0700 Message-Id: <1378772902-4074-7-git-send-email-rth@twiddle.net> In-Reply-To: <1378772902-4074-1-git-send-email-rth@twiddle.net> References: <1378772902-4074-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v2 6/7] tcg-ppc: Use conditional branch and link to slow path List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, "Vassili Karpov (malc)" , aurelien@aurel32.net, Richard Henderson Saves one insn per slow path. Note that we can no longer use a tail call into the store helper. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index a5f1f99..516d28f 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -611,9 +611,14 @@ static void tcg_out_tlb_check (TCGContext *s, int r0, int r1, int r2, tcg_out32 (s, CMP | BF (6) | RA (addr_reg2) | RB (r1)); tcg_out32 (s, CRAND | BT (7, CR_EQ) | BA (6, CR_EQ) | BB (7, CR_EQ)); #endif + + /* Use a conditional branch-and-link so that we load a pointer to + somewhere within the current opcode, for passing on to the helper. + This address cannot be used for a tail call, but it's shorter + than forming an address from scratch. */ *label_ptr = s->code_ptr; retranst = ((uint16_t *) s->code_ptr)[1] & ~3; - tcg_out32 (s, BC | BI (7, CR_EQ) | retranst | BO_COND_FALSE); + tcg_out32(s, BC | BI(7, CR_EQ) | retranst | BO_COND_FALSE | LK); /* r0 now contains &env->tlb_table[mem_index][index].addr_x */ tcg_out32 (s, (LWZ @@ -853,7 +858,7 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l) tcg_out_mov(s, TCG_TYPE_I32, ir++, l->addrlo_reg); } tcg_out_movi(s, TCG_TYPE_I32, ir++, l->mem_index); - tcg_out_movi(s, TCG_TYPE_PTR, ir, (uintptr_t)l->raddr); + tcg_out32(s, MFSPR | RT(ir++) | LR); tcg_out_b(s, LK, (uintptr_t)ld_trampolines[l->opc & 3]); datalo = l->datalo_reg; @@ -928,9 +933,9 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) ir++; tcg_out_movi(s, TCG_TYPE_I32, ir++, l->mem_index); - tcg_out_movi(s, TCG_TYPE_PTR, ir, (uintptr_t)l->raddr); - tcg_out32(s, MTSPR | RS(ir) | LR); - tcg_out_b(s, 0, (uintptr_t)st_trampolines[l->opc]); + tcg_out32(s, MFSPR | RT(ir++) | LR); + tcg_out_b(s, LK, (uintptr_t)st_trampolines[l->opc]); + tcg_out_b(s, 0, (uintptr_t)l->raddr); } void tcg_out_tb_finalize(TCGContext *s) -- 1.8.3.1