[Qemu-devel] [PULL 04/28] target-arm: fix ARMv7M stack alignment on reset

[Peter Maydell <peter.maydell@linaro.org>]

From: Sebastian Ottlik <ottlik@fzi.de>

When the initial SP is loaded from the vector table on ARMv7M systems the two
least significant bits are ignored as the stack is always aligned at a four byte
boundary (see ARM DDI 0403C, B1.4.1 and B1.5.5). So far QEMU did not ignore
these bits leading to a stack alignment inconsitent with real hardware for
binaries that rely on this behaviour. This patch fixes this issue by masking the
two least significant bits when loading the SP.

Signed-off-by: Sebastian Ottlik <ottlik@fzi.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1378286595-27072-1-git-send-email-ottlik@fzi.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/cpu.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 827e28e..09206b5 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -108,7 +108,7 @@ static void arm_cpu_reset(CPUState *s)
                modified flash and reset itself.  However images
                loaded via -kernel have not been copied yet, so load the
                values directly from there.  */
-            env->regs[13] = ldl_p(rom);
+            env->regs[13] = ldl_p(rom) & 0xFFFFFFFC;
             pc = ldl_p(rom + 4);
             env->thumb = pc & 1;
             env->regs[15] = pc & ~1;
-- 
1.7.9.5