From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37993) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJxXQ-00053B-B7 for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:25:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJxXH-000392-PZ for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:25:48 -0400 Received: from mail-oa0-x22b.google.com ([2607:f8b0:4003:c02::22b]:56673) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJxXH-00038w-KJ for qemu-devel@nongnu.org; Wed, 11 Sep 2013 23:25:39 -0400 Received: by mail-oa0-f43.google.com with SMTP id i10so10202568oag.2 for ; Wed, 11 Sep 2013 20:25:39 -0700 (PDT) From: Liu Ping Fan Date: Thu, 12 Sep 2013 11:25:14 +0800 Message-Id: <1378956318-23395-2-git-send-email-pingfank@linux.vnet.ibm.com> In-Reply-To: <1378956318-23395-1-git-send-email-pingfank@linux.vnet.ibm.com> References: <1378956318-23395-1-git-send-email-pingfank@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v5 1/5] hpet: inverse polarity when pin above ISA_NUM_IRQS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , Anthony Liguori , Jan Kiszka , Stefan Hajnoczi , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= According to hpet spec, hpet irq is high active. But according to ICH spec, there is inversion before the input of ioapic. So the OS will expect low active on this IRQ line.(And this is observed on bare metal). We fold the emulation of this inversion inside the hpet logic. Signed-off-by: Liu Ping Fan --- hw/timer/hpet.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index fcd22ae..8429eb3 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set) if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) { s->isr &= ~mask; if (!timer_fsb_route(timer)) { - qemu_irq_lower(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_raise(s->irqs[route]); + } else { + qemu_irq_lower(s->irqs[route]); + } } } else if (timer_fsb_route(timer)) { stl_le_phys(timer->fsb >> 32, timer->fsb & 0xffffffff); } else if (timer->config & HPET_TN_TYPE_LEVEL) { s->isr |= mask; - qemu_irq_raise(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_lower(s->irqs[route]); + } else { + qemu_irq_raise(s->irqs[route]); + } } else { s->isr &= ~mask; qemu_irq_pulse(s->irqs[route]); -- 1.8.1.4