From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55367) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKBdS-0002Ww-8D for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:29:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VKBdM-0006i3-Vu for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:28:58 -0400 Received: from mail-qe0-x231.google.com ([2607:f8b0:400d:c02::231]:58410) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKBdM-0006hz-RR for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:28:52 -0400 Received: by mail-qe0-f49.google.com with SMTP id s14so155709qeb.22 for ; Thu, 12 Sep 2013 11:28:52 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 12 Sep 2013 11:28:15 -0700 Message-Id: <1379010496-5875-2-git-send-email-rth@twiddle.net> In-Reply-To: <1379010496-5875-1-git-send-email-rth@twiddle.net> References: <1379010496-5875-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 1/2] target-i386: fix disassembly with PAE=1, PG=0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , anthony@codemonkey.ws From: Paolo Bonzini CR4.PAE=1 will not enable paging if CR0.PG=0, but the "if" chain in x86_cpu_get_phys_page_debug says otherwise. Check CR0.PG before everything else. Fixes "-d in_asm" for a code section at the beginning of OVMF. Signed-off-by: Paolo Bonzini Signed-off-by: Richard Henderson Reviewed-by: Max Filippov --- target-i386/helper.c | 34 ++++++++++++++++------------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index 7c58e27..8bf85ec 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -894,7 +894,10 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) uint32_t page_offset; int page_size; - if (env->cr[4] & CR4_PAE_MASK) { + if (!(env->cr[0] & CR0_PG_MASK)) { + pte = addr & env->a20_mask; + page_size = 4096; + } else if (env->cr[4] & CR4_PAE_MASK) { target_ulong pdpe_addr; uint64_t pde, pdpe; @@ -952,26 +955,21 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } else { uint32_t pde; - if (!(env->cr[0] & CR0_PG_MASK)) { - pte = addr; - page_size = 4096; + /* page directory entry */ + pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask; + pde = ldl_phys(pde_addr); + if (!(pde & PG_PRESENT_MASK)) + return -1; + if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { + pte = pde & ~0x003ff000; /* align to 4MB */ + page_size = 4096 * 1024; } else { /* page directory entry */ - pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask; - pde = ldl_phys(pde_addr); - if (!(pde & PG_PRESENT_MASK)) + pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask; + pte = ldl_phys(pte_addr); + if (!(pte & PG_PRESENT_MASK)) return -1; - if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { - pte = pde & ~0x003ff000; /* align to 4MB */ - page_size = 4096 * 1024; - } else { - /* page directory entry */ - pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask; - pte = ldl_phys(pte_addr); - if (!(pte & PG_PRESENT_MASK)) - return -1; - page_size = 4096; - } + page_size = 4096; } pte = pte & env->a20_mask; } -- 1.8.1.4