From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55375) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKBdT-0002Wx-Qq for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:29:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VKBdO-0006iW-Ku for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:28:59 -0400 Received: from mail-qc0-x233.google.com ([2607:f8b0:400d:c01::233]:46339) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VKBdO-0006iS-H4 for qemu-devel@nongnu.org; Thu, 12 Sep 2013 14:28:54 -0400 Received: by mail-qc0-f179.google.com with SMTP id l4so139813qcv.10 for ; Thu, 12 Sep 2013 11:28:54 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Thu, 12 Sep 2013 11:28:16 -0700 Message-Id: <1379010496-5875-3-git-send-email-rth@twiddle.net> In-Reply-To: <1379010496-5875-1-git-send-email-rth@twiddle.net> References: <1379010496-5875-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 2/2] target-i386: Only provide CMOV and friends if feature bit set List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , anthony@codemonkey.ws From: Peter Maydell The instructions CMOVcc, FCMOVcc and F[U]COMI[P] should only be present if the CMOV feature bit is set. Add missing feature bit checks so we correctly fault if emulating a 486 or 586. This fixes bug LP:1201446. Signed-off-by: Peter Maydell Signed-off-by: Richard Henderson --- target-i386/translate.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/target-i386/translate.c b/target-i386/translate.c index 6d87900..be74ebc 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -6434,12 +6434,18 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } break; case 0x1d: /* fucomi */ + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } gen_update_cc_op(s); gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fucomi_ST0_FT0(cpu_env); set_cc_op(s, CC_OP_EFLAGS); break; case 0x1e: /* fcomi */ + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } gen_update_cc_op(s); gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fcomi_ST0_FT0(cpu_env); @@ -6495,6 +6501,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } break; case 0x3d: /* fucomip */ + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } gen_update_cc_op(s); gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fucomi_ST0_FT0(cpu_env); @@ -6502,6 +6511,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, set_cc_op(s, CC_OP_EFLAGS); break; case 0x3e: /* fcomip */ + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } gen_update_cc_op(s); gen_helper_fmov_FT0_STN(cpu_env, tcg_const_i32(opreg)); gen_helper_fcomi_ST0_FT0(cpu_env); @@ -6518,6 +6530,10 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, (JCC_BE << 1), (JCC_P << 1), }; + + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } op1 = fcmov_cc[op & 3] | (((op >> 3) & 1) ^ 1); l1 = gen_new_label(); gen_jcc1_noeob(s, op1, l1); @@ -6889,6 +6905,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_ldst_modrm(env, s, modrm, OT_BYTE, OR_TMP0, 1); break; case 0x140 ... 0x14f: /* cmov Gv, Ev */ + if (!(s->cpuid_features & CPUID_CMOV)) { + goto illegal_op; + } ot = dflag + OT_WORD; modrm = cpu_ldub_code(env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; -- 1.8.1.4