From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34671) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VN4tv-0004GE-CA for qemu-devel@nongnu.org; Fri, 20 Sep 2013 13:53:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VN4tq-0000Ax-Pc for qemu-devel@nongnu.org; Fri, 20 Sep 2013 13:53:55 -0400 From: Stefan Hajnoczi Date: Fri, 20 Sep 2013 19:53:32 +0200 Message-Id: <1379699613-5338-2-git-send-email-stefanha@redhat.com> In-Reply-To: <1379699613-5338-1-git-send-email-stefanha@redhat.com> References: <1379699613-5338-1-git-send-email-stefanha@redhat.com> Subject: [Qemu-devel] [PULL 1/2] pcnet-pci: mark I/O and MMIO as LITTLE_ENDIAN List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi , Aurelien Jarno , Anthony Liguori , qemu-stable@nongnu.org From: Aurelien Jarno Now that the memory subsystem is propagating the endianness correctly, the pcnet-pci device should have its I/O ports and MMIO memory marked as LITTLE_ENDIAN, as PCI devices are little endian. This makes the pcnet-pci NIC to work again on big endian MIPS Malta (default NIC). Cc: qemu-stable@nongnu.org Signed-off-by: Aurelien Jarno Reviewed-by: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi --- hw/net/pcnet-pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index a893165..865f2f0 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr, static const MemoryRegionOps pcnet_io_ops = { .read = pcnet_ioport_read, .write = pcnet_ioport_write, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val) @@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = { .read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl }, .write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel }, }, - .endianness = DEVICE_NATIVE_ENDIAN, + .endianness = DEVICE_LITTLE_ENDIAN, }; static void pci_physical_memory_write(void *dma_opaque, hwaddr addr, -- 1.8.3.1