From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44634) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VP4v3-0001Yb-AH for qemu-devel@nongnu.org; Thu, 26 Sep 2013 02:19:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VP4ur-00086L-0G for qemu-devel@nongnu.org; Thu, 26 Sep 2013 02:19:21 -0400 Received: from e23smtp03.au.ibm.com ([202.81.31.145]:54354) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VP4uq-00085C-9B for qemu-devel@nongnu.org; Thu, 26 Sep 2013 02:19:08 -0400 Received: from /spool/local by e23smtp03.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 26 Sep 2013 16:19:05 +1000 From: Alexey Kardashevskiy Date: Thu, 26 Sep 2013 16:18:48 +1000 Message-Id: <1380176328-21320-15-git-send-email-aik@ozlabs.ru> In-Reply-To: <1380176328-21320-1-git-send-email-aik@ozlabs.ru> References: <1380176328-21320-1-git-send-email-aik@ozlabs.ru> Subject: [Qemu-devel] [PATCH v5 14/14] spapr-pci: enable irqfd for INTx List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexey Kardashevskiy , qemu-ppc@nongnu.org, Alexander Graf , Anthony Liguori , David Gibson This enables IRQFD for LSI (level triggered INTx interrupts) by adding a spapr_route_intx_pin_to_irq() callback to the sPAPR PCI host bus. This callback is called to know the global interrupt number to link resampling fd with IRQFD's fd in KVM. Signed-off-by: Alexey Kardashevskiy --- hw/ppc/spapr_pci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 9b6ee32..edb4cb0 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -432,6 +432,17 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); } +static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin) +{ + sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(opaque); + PCIINTxRoute route; + + route.mode = PCI_INTX_ENABLED; + route.irq = sphb->lsi_table[pin].irq; + + return route; +} + /* * MSI/MSIX memory region implementation. * The handler handles both MSI and MSIX. @@ -610,6 +621,8 @@ static int spapr_phb_init(SysBusDevice *s) pci_setup_iommu(bus, spapr_pci_dma_iommu, sphb); + pci_bus_set_route_irq_fn(bus, spapr_route_intx_pin_to_irq); + QLIST_INSERT_HEAD(&spapr->phbs, sphb, list); /* Initialize the LSI table */ -- 1.8.4.rc4