[Qemu-devel] [PATCH 04/60] arm: Add AArch64 disassembler stub

[Alexander Graf <agraf@suse.de>]

While we don't have a working disassembler for AArch64 yet, we still
don't want AArch64 code be disassembled through the old AArch32
disassembler.

So add a small disassembler stub that declares every instruction as
unsupported. This should be a good enough base to plug in a real one
later.

Signed-off-by: Alexander Graf <agraf@suse.de>
---
 disas.c             |  6 +++++-
 disas/Makefile.objs |  1 +
 disas/aarch64.c     | 31 +++++++++++++++++++++++++++++++
 include/disas/bfd.h |  1 +
 4 files changed, 38 insertions(+), 1 deletion(-)
 create mode 100644 disas/aarch64.c

diff --git a/disas.c b/disas.c
index 0203ef2..5b6956e 100644
--- a/disas.c
+++ b/disas.c
@@ -150,7 +150,7 @@ bfd_vma bfd_getb16 (const bfd_byte *addr)
   return (bfd_vma) v;
 }
 
-#ifdef TARGET_ARM
+#if defined(TARGET_ARM) && !defined(TARGET_AARCH64)
 static int
 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
 {
@@ -224,6 +224,8 @@ void target_disas(FILE *out, CPUArchState *env, target_ulong code,
         s.info.mach = bfd_mach_i386_i386;
     }
     print_insn = print_insn_i386;
+#elif defined(TARGET_AARCH64)
+    print_insn = print_insn_aarch64;
 #elif defined(TARGET_ARM)
     if (flags & 1) {
         print_insn = print_insn_thumb1;
@@ -464,6 +466,8 @@ void monitor_disas(Monitor *mon, CPUArchState *env,
         s.info.mach = bfd_mach_i386_i386;
     }
     print_insn = print_insn_i386;
+#elif defined(TARGET_AARCH64)
+    print_insn = print_insn_aarch64;
 #elif defined(TARGET_ARM)
     print_insn = print_insn_arm;
 #elif defined(TARGET_ALPHA)
diff --git a/disas/Makefile.objs b/disas/Makefile.objs
index 3b1e77a..55e9da4 100644
--- a/disas/Makefile.objs
+++ b/disas/Makefile.objs
@@ -13,6 +13,7 @@ common-obj-$(CONFIG_S390_DIS) += s390.o
 common-obj-$(CONFIG_SH4_DIS) += sh4.o
 common-obj-$(CONFIG_SPARC_DIS) += sparc.o
 common-obj-$(CONFIG_LM32_DIS) += lm32.o
+common-obj-$(CONFIG_ARM_DIS) += aarch64.o
 
 # TODO: As long as the TCG interpreter and its generated code depend
 # on the QEMU target, we cannot compile the disassembler here.
diff --git a/disas/aarch64.c b/disas/aarch64.c
new file mode 100644
index 0000000..13c667d
--- /dev/null
+++ b/disas/aarch64.c
@@ -0,0 +1,31 @@
+#include "disas/bfd.h"
+
+#define INSNLEN 4
+
+/* Stub disassembler for aarch64.  */
+
+int print_insn_aarch64(bfd_vma pc, struct disassemble_info *info)
+{
+    bfd_byte buffer[INSNLEN];
+    int status;
+    unsigned int size = 4;
+    uint32_t data;
+
+    /* Aarch64 instructions are always little-endian */
+    info->endian = BFD_ENDIAN_LITTLE;
+    info->bytes_per_chunk = size = INSNLEN;
+    info->display_endian = info->endian;
+
+    status = (*info->read_memory_func)(pc, buffer, size, info);
+    if (status != 0) {
+        (*info->memory_error_func)(status, pc, info);
+        return -1;
+    }
+
+    data = ldl_p(buffer);
+
+    (*info->fprintf_func)(info->stream, "\t[0x%08x] (%02x)\t.unknown",
+                          data, (data >> 24) & 0x1f);
+
+    return size;
+}
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 803b6ef..6947e4c 100644
--- a/include/disas/bfd.h
+++ b/include/disas/bfd.h
@@ -409,6 +409,7 @@ int print_insn_crisv10          (bfd_vma, disassemble_info*);
 int print_insn_microblaze       (bfd_vma, disassemble_info*);
 int print_insn_ia64             (bfd_vma, disassemble_info*);
 int print_insn_lm32             (bfd_vma, disassemble_info*);
+int print_insn_aarch64          (bfd_vma, disassemble_info*);
 
 #if 0
 /* Fetch the disassembler for a given BFD, if that support is available.  */
-- 
1.7.12.4