From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52084) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VR7Qg-0003LG-Aj for qemu-devel@nongnu.org; Tue, 01 Oct 2013 17:24:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VR7Qa-0003v4-4K for qemu-devel@nongnu.org; Tue, 01 Oct 2013 17:24:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49199) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VR7QZ-0003uw-Sc for qemu-devel@nongnu.org; Tue, 01 Oct 2013 17:24:20 -0400 Date: Wed, 2 Oct 2013 00:26:40 +0300 From: "Michael S. Tsirkin" Message-ID: <1380662727-24170-10-git-send-email-mst@redhat.com> References: <1380662727-24170-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1380662727-24170-1-git-send-email-mst@redhat.com> Subject: [Qemu-devel] [PATCH v7 09/27] pcie_host: expose address format List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, afaerber@suse.de, Anthony Liguori , kraxel@redhat.com Callers pass in the address so it's helpful for them to be able to decode it. Reviewed-by: Gerd Hoffmann Tested-by: Gerd Hoffmann Signed-off-by: Michael S. Tsirkin --- include/hw/pci/pcie_host.h | 21 +++++++++++++++++++++ hw/pci/pcie_host.c | 21 --------------------- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h index bac3c67..da0f275 100644 --- a/include/hw/pci/pcie_host.h +++ b/include/hw/pci/pcie_host.h @@ -54,4 +54,25 @@ void pcie_host_mmcfg_update(PCIExpressHost *e, hwaddr addr, uint32_t size); +/* + * PCI express ECAM (Enhanced Configuration Address Mapping) format. + * AKA mmcfg address + * bit 20 - 28: bus number + * bit 15 - 19: device number + * bit 12 - 14: function number + * bit 0 - 11: offset in configuration space of a given device + */ +#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) +#define PCIE_MMCFG_SIZE_MIN (1ULL << 20) +#define PCIE_MMCFG_BUS_BIT 20 +#define PCIE_MMCFG_BUS_MASK 0x1ff +#define PCIE_MMCFG_DEVFN_BIT 12 +#define PCIE_MMCFG_DEVFN_MASK 0xff +#define PCIE_MMCFG_CONFOFFSET_MASK 0xfff +#define PCIE_MMCFG_BUS(addr) (((addr) >> PCIE_MMCFG_BUS_BIT) & \ + PCIE_MMCFG_BUS_MASK) +#define PCIE_MMCFG_DEVFN(addr) (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \ + PCIE_MMCFG_DEVFN_MASK) +#define PCIE_MMCFG_CONFOFFSET(addr) ((addr) & PCIE_MMCFG_CONFOFFSET_MASK) + #endif /* PCIE_HOST_H */ diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index 410ac08..c6e1b57 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -24,27 +24,6 @@ #include "hw/pci/pcie_host.h" #include "exec/address-spaces.h" -/* - * PCI express mmcfig address - * bit 20 - 28: bus number - * bit 15 - 19: device number - * bit 12 - 14: function number - * bit 0 - 11: offset in configuration space of a given device - */ -#define PCIE_MMCFG_SIZE_MAX (1ULL << 28) -#define PCIE_MMCFG_SIZE_MIN (1ULL << 20) -#define PCIE_MMCFG_BUS_BIT 20 -#define PCIE_MMCFG_BUS_MASK 0x1ff -#define PCIE_MMCFG_DEVFN_BIT 12 -#define PCIE_MMCFG_DEVFN_MASK 0xff -#define PCIE_MMCFG_CONFOFFSET_MASK 0xfff -#define PCIE_MMCFG_BUS(addr) (((addr) >> PCIE_MMCFG_BUS_BIT) & \ - PCIE_MMCFG_BUS_MASK) -#define PCIE_MMCFG_DEVFN(addr) (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \ - PCIE_MMCFG_DEVFN_MASK) -#define PCIE_MMCFG_CONFOFFSET(addr) ((addr) & PCIE_MMCFG_CONFOFFSET_MASK) - - /* a helper function to get a PCIDevice for a given mmconfig address */ static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s, uint32_t mmcfg_addr) -- MST