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From: Alex Williamson <alex.williamson@redhat.com>
To: Marcel Apfelbaum <marcel.a@redhat.com>
Cc: kwolf@redhat.com, peter.maydell@linaro.org,
	peter.crosthwaite@xilinx.com, anthony@codemonkey.ws,
	mst@redhat.com, sw@weilnetz.de, jasowang@redhat.com,
	qemu-devel@nongnu.org, dkoch@verizon.com, keith.busch@intel.com,
	kraxel@redhat.com, stefanha@redhat.com, dmitry@daynix.com,
	pbonzini@redhat.com, afaerber@suse.de, ehabkost@redhat.com
Subject: Re: [Qemu-devel] [PATCH RFC v2 5/9] hw/vfio: set interrupts using pci irq wrappers
Date: Wed, 02 Oct 2013 09:58:10 -0600	[thread overview]
Message-ID: <1380729490.14271.84.camel@ul30vt.home> (raw)
In-Reply-To: <1380717694-13091-6-git-send-email-marcel.a@redhat.com>

On Wed, 2013-10-02 at 15:41 +0300, Marcel Apfelbaum wrote:
> pci_set_irq and the other pci irq wrappers use
> PCI_INTERRUPT_PIN config register to compute device
> INTx pin to assert/deassert.
> 
> Save INTx pin into the config register before calling
> pci_set_irq
> 
> Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
> ---
>  hw/misc/vfio.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)

Seems ok, but why not take advantage of the pci_irq_raise/lower()
wrappers?  BTW, with PCI being active low, should those be
assert/deassert to avoid confusion confusion with the actual signal
level?  Thanks,

Alex

> 
> diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
> index a1c08fb..3d7297c 100644
> --- a/hw/misc/vfio.c
> +++ b/hw/misc/vfio.c
> @@ -297,7 +297,7 @@ static void vfio_intx_interrupt(void *opaque)
>              'A' + vdev->intx.pin);
>  
>      vdev->intx.pending = true;
> -    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);
> +    pci_set_irq(&vdev->pdev, 1);
>      vfio_mmap_set_enabled(vdev, false);
>      if (vdev->intx.mmap_timeout) {
>          timer_mod(vdev->intx.mmap_timer,
> @@ -315,7 +315,7 @@ static void vfio_eoi(VFIODevice *vdev)
>              vdev->host.bus, vdev->host.slot, vdev->host.function);
>  
>      vdev->intx.pending = false;
> -    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
> +    pci_set_irq(&vdev->pdev, 0);
>      vfio_unmask_intx(vdev);
>  }
>  
> @@ -341,7 +341,7 @@ static void vfio_enable_intx_kvm(VFIODevice *vdev)
>      qemu_set_fd_handler(irqfd.fd, NULL, NULL, vdev);
>      vfio_mask_intx(vdev);
>      vdev->intx.pending = false;
> -    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
> +    pci_set_irq(&vdev->pdev, 0);
>  
>      /* Get an eventfd for resample/unmask */
>      if (event_notifier_init(&vdev->intx.unmask, 0)) {
> @@ -417,7 +417,7 @@ static void vfio_disable_intx_kvm(VFIODevice *vdev)
>       */
>      vfio_mask_intx(vdev);
>      vdev->intx.pending = false;
> -    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
> +    pci_set_irq(&vdev->pdev, 0);
>  
>      /* Tell KVM to stop listening for an INTx irqfd */
>      if (kvm_vm_ioctl(kvm_state, KVM_IRQFD, &irqfd)) {
> @@ -488,6 +488,7 @@ static int vfio_enable_intx(VFIODevice *vdev)
>      vfio_disable_interrupts(vdev);
>  
>      vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */
> +    pci_config_set_interrupt_pin(vdev->pdev.config, pin);
>  
>  #ifdef CONFIG_KVM
>      /*
> @@ -547,7 +548,7 @@ static void vfio_disable_intx(VFIODevice *vdev)
>      vfio_disable_intx_kvm(vdev);
>      vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);
>      vdev->intx.pending = false;
> -    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);
> +    pci_set_irq(&vdev->pdev, 0);
>      vfio_mmap_set_enabled(vdev, true);
>  
>      fd = event_notifier_get_fd(&vdev->intx.interrupt);

  reply	other threads:[~2013-10-02 15:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-02 12:41 [Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 1/9] hw/core: Add interface to allocate and free a single IRQ Marcel Apfelbaum
2013-10-02 12:50   ` Michael S. Tsirkin
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs Marcel Apfelbaum
2013-10-02 12:54   ` Michael S. Tsirkin
2013-10-02 12:56     ` Marcel Apfelbaum
2013-10-02 15:21   ` Paolo Bonzini
2013-10-02 22:03     ` Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 3/9] hw/pci-bridge: set PCI_INTERRUPT_PIN register before shpc init Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 4/9] hw/vmxnet3: set interrupts using pci irq wrappers Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 5/9] hw/vfio: " Marcel Apfelbaum
2013-10-02 15:58   ` Alex Williamson [this message]
2013-10-02 22:16     ` Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 6/9] hw/xhci: " Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 7/9] hw: " Marcel Apfelbaum
2013-10-07  7:02   ` Gerd Hoffmann
2013-10-07  7:13     ` Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 8/9] hw/pcie: AER and hot-plug events must use device's interrupt Marcel Apfelbaum
2013-10-02 12:41 ` [Qemu-devel] [PATCH RFC v2 9/9] hw/pci: removed irq field from PCIDevice Marcel Apfelbaum
2013-10-02 12:58 ` [Qemu-devel] [PATCH RFC v2 0/9] hw/pci: set irq without selecting INTx pin Michael S. Tsirkin
2013-10-02 13:05   ` Marcel Apfelbaum
2013-10-02 16:03     ` Alex Williamson

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