From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59467) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRjEZ-0000sE-RE for qemu-devel@nongnu.org; Thu, 03 Oct 2013 09:46:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VRjET-0000rd-RT for qemu-devel@nongnu.org; Thu, 03 Oct 2013 09:46:27 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58232) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VRjET-0000oG-Gk for qemu-devel@nongnu.org; Thu, 03 Oct 2013 09:46:21 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r93DkJ12009646 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Thu, 3 Oct 2013 09:46:19 -0400 From: Paolo Bonzini Date: Thu, 3 Oct 2013 15:46:11 +0200 Message-Id: <1380807975-13266-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 0/4] qdev: switch reset to post-order, clean up PCI reset List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: mst@redhat.com PCI is handling resetting of its devices before the bus is reset, but this is only necessary because qdev is broken and usually does pre-order reset. Post-order is a much better definition. Drop the unnecessary flexibility that lets bus decide the reset order, convert to post-order, and make PCI use common code for reset. Paolo Bonzini (4): pci: do not export pci_bus_reset pci: clean up resetting of IRQs qdev: allow both pre- and post-order vists in qdev walking functions qdev: switch reset to post-order hw/core/qdev.c | 47 ++++++++++++++++++++++++++++++++++------------- hw/pci/pci.c | 42 ++++++++++++++++++++---------------------- hw/pci/pci_bridge.c | 2 +- include/hw/pci/pci.h | 1 - include/hw/qdev-core.h | 15 ++++++++++----- 5 files changed, 65 insertions(+), 42 deletions(-)