From: Marcel Apfelbaum <marcel.a@redhat.com>
To: qemu-devel@nongnu.org
Cc: kwolf@redhat.com, peter.maydell@linaro.org,
peter.crosthwaite@xilinx.com, anthony@codemonkey.ws,
mst@redhat.com, sw@weilnetz.de, jasowang@redhat.com,
dkoch@verizon.com, keith.busch@intel.com,
alex.williamson@redhat.com, kraxel@redhat.com,
stefanha@redhat.com, dmitry@daynix.com, pbonzini@redhat.com,
afaerber@suse.de, ehabkost@redhat.com
Subject: [Qemu-devel] [PATCH v3 2/8] hw/pci: add pci wrappers for allocating and asserting irqs
Date: Mon, 7 Oct 2013 10:36:35 +0300 [thread overview]
Message-ID: <1381131401-15155-3-git-send-email-marcel.a@redhat.com> (raw)
In-Reply-To: <1381131401-15155-1-git-send-email-marcel.a@redhat.com>
Interrupt pin is selected and saved into PCI_INTERRUPT_PIN
register during device initialization. Devices should not call
directly qemu_set_irq and specify the INTx pin on each call.
Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise,
qemu_irq_lower and qemu_irq_pulse, setting the irq
based on PCI_INTERRUPT_PIN.
Added pci_allocate_irq wrapper to be used by devices that
still need PCIDevice infrastructure to assert irqs.
Renamed a static method which was named already pci_set_irq.
Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com>
---
Changes from v2:
- Addressed Michael S. Tsirkin's comments:
- Add "fixme" comment to pci_irq_pulse
- Addressed Alex Williamson's comments
- replaced pci_irq_raise/lower with
pci_irq_assert/deassert
- Addressed Paolo Bonzini's comment:
- fixed implementation of pci_irq_pulse
hw/pci/pci.c | 26 ++++++++++++++++++++++----
include/hw/pci/pci.h | 23 +++++++++++++++++++++++
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 00554a0..fbfd8f7 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -83,7 +83,7 @@ static const TypeInfo pcie_bus_info = {
static PCIBus *pci_find_bus_nr(PCIBus *bus, int bus_num);
static void pci_update_mappings(PCIDevice *d);
-static void pci_set_irq(void *opaque, int irq_num, int level);
+static void pci_irq_handler(void *opaque, int irq_num, int level);
static int pci_add_option_rom(PCIDevice *pdev, bool is_default_rom);
static void pci_del_option_rom(PCIDevice *pdev);
@@ -161,7 +161,7 @@ void pci_device_deassert_intx(PCIDevice *dev)
{
int i;
for (i = 0; i < PCI_NUM_PINS; ++i) {
- qemu_set_irq(dev->irq[i], 0);
+ pci_irq_handler(dev, i, 0);
}
}
@@ -863,7 +863,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
pci_dev->config_read = config_read;
pci_dev->config_write = config_write;
bus->devices[devfn] = pci_dev;
- pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS);
+ pci_dev->irq = qemu_allocate_irqs(pci_irq_handler, pci_dev, PCI_NUM_PINS);
pci_dev->version_id = 2; /* Current pci device vmstate version */
return pci_dev;
}
@@ -1175,7 +1175,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
/* generic PCI irq support */
/* 0 <= irq_num <= 3. level must be 0 or 1 */
-static void pci_set_irq(void *opaque, int irq_num, int level)
+static void pci_irq_handler(void *opaque, int irq_num, int level)
{
PCIDevice *pci_dev = opaque;
int change;
@@ -1191,6 +1191,24 @@ static void pci_set_irq(void *opaque, int irq_num, int level)
pci_change_irq_level(pci_dev, irq_num, change);
}
+static inline int pci_intx(PCIDevice *pci_dev)
+{
+ return pci_get_byte(pci_dev->config + PCI_INTERRUPT_PIN) - 1;
+}
+
+qemu_irq pci_allocate_irq(PCIDevice *pci_dev)
+{
+ int intx = pci_intx(pci_dev);
+
+ return qemu_allocate_irq(pci_irq_handler, pci_dev, intx);
+}
+
+void pci_set_irq(PCIDevice *pci_dev, int level)
+{
+ int intx = pci_intx(pci_dev);
+ pci_irq_handler(pci_dev, intx, level);
+}
+
/* Special hooks used by device assignment */
void pci_bus_set_route_irq_fn(PCIBus *bus, pci_route_irq_fn route_intx_to_irq)
{
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 4b90e5d..990342c 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -632,6 +632,29 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name);
PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name);
+qemu_irq pci_allocate_irq(PCIDevice *pci_dev);
+void pci_set_irq(PCIDevice *pci_dev, int level);
+
+static inline void pci_irq_assert(PCIDevice *pci_dev)
+{
+ pci_set_irq(pci_dev, 1);
+}
+
+static inline void pci_irq_deassert(PCIDevice *pci_dev)
+{
+ pci_set_irq(pci_dev, 0);
+}
+
+/*
+ * FIXME: PCI does not work this way.
+ * All the callers to this method should be fixed.
+ */
+static inline void pci_irq_pulse(PCIDevice *pci_dev)
+{
+ pci_irq_assert(pci_dev);
+ pci_irq_deassert(pci_dev);
+}
+
static inline int pci_is_express(const PCIDevice *d)
{
return d->cap_present & QEMU_PCI_CAP_EXPRESS;
--
1.8.3.1
next prev parent reply other threads:[~2013-10-07 7:36 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-07 7:36 [Qemu-devel] [PATCH v3 0/8] hw/pci: set irq without selecting INTx pin Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 1/8] hw/core: Add interface to allocate and free a single IRQ Marcel Apfelbaum
2013-10-07 7:36 ` Marcel Apfelbaum [this message]
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 3/8] hw/pci-bridge: set PCI_INTERRUPT_PIN register before shpc init Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 4/8] hw/vmxnet3: set interrupts using pci irq wrappers Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 5/8] hw/vfio: " Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 6/8] hw: " Marcel Apfelbaum
2013-10-07 8:03 ` Michael S. Tsirkin
2013-10-07 8:04 ` Michael S. Tsirkin
2013-10-07 8:14 ` Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 7/8] hw/pcie: AER and hot-plug events must use device's interrupt Marcel Apfelbaum
2013-10-07 7:36 ` [Qemu-devel] [PATCH v3 8/8] hw/pci: removed irq field from PCIDevice Marcel Apfelbaum
2013-10-07 10:05 ` [Qemu-devel] [PATCH v3 0/8] hw/pci: set irq without selecting INTx pin Michael S. Tsirkin
2013-10-08 14:33 ` Michael S. Tsirkin
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