From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52160) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VT5ec-0000aD-LM for qemu-devel@nongnu.org; Mon, 07 Oct 2013 03:55:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VT5eW-0004YK-Eu for qemu-devel@nongnu.org; Mon, 07 Oct 2013 03:54:58 -0400 Received: from mx1.redhat.com ([209.132.183.28]:61076) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VT5eW-0004YB-6J for qemu-devel@nongnu.org; Mon, 07 Oct 2013 03:54:52 -0400 Message-ID: <1381132485.13574.34.camel@nilsson.home.kraxel.org> From: Gerd Hoffmann Date: Mon, 07 Oct 2013 09:54:45 +0200 In-Reply-To: <20131004152013.0d0a9cd2@nial.usersys.redhat.com> References: <0577863ea4bc4e0d91675e4fd250c1065ba4ebd9.1377075625.git.hutao@cn.fujitsu.com> <1377082892.31946.7.camel@nilsson.home.kraxel.org> <20131004152013.0d0a9cd2@nial.usersys.redhat.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] q35: add cpu hotplug support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: Hu Tao , qemu-devel@nongnu.org On Fr, 2013-10-04 at 15:20 +0200, Igor Mammedov wrote: > On Wed, 21 Aug 2013 13:01:32 +0200 > Gerd Hoffmann wrote: > > > Hi, > > > > > +#define ICH9_PROC_BASE 0xaf00 > > > +#define ICH9_PROC_LEN 32 > > > > No, please don't. It makes it impossible to assign the 0xa000 -> 0xafff > > I/O port window to a PCI bridge. Please lets stop occupy random io > > ports above 0x1000 and burn I/O address space that way. > I'm curios why 0x1000 is any better than 0xa000, it still would be random > port occupation. Is there any guideline which ports could be used and which > shouldn't? 0x1000 doesn't by us anything. *below* 0x1000 gives us one more pci io window which we can assign to a pci bridge then. > Could we safely move PIIX CPU hotplug 0xaf00-0xaf20 range below 0x1000? I'd love to, but unfortunaly it isn't that easy as the address is hard-coded in the DSDT. Once mst acpi generation patches are in it would be a bit simpler, but we would still break compatibility with seabios versions not fetching the acpi tables from qemu. cheers, Gerd