From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54047) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VTsnL-0000Av-Gv for qemu-devel@nongnu.org; Wed, 09 Oct 2013 08:23:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VTsnF-0002Ck-Gb for qemu-devel@nongnu.org; Wed, 09 Oct 2013 08:23:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:1260) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VTsnF-0002Cc-8q for qemu-devel@nongnu.org; Wed, 09 Oct 2013 08:23:09 -0400 From: Igor Mammedov Date: Wed, 9 Oct 2013 14:23:04 +0200 Message-Id: <1381321384-17270-1-git-send-email-imammedo@redhat.com> Subject: [Qemu-devel] [RFC] map 64-bit PCI devices after all possible RAM List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: seabios@seabios.org Cc: pbonzini@redhat.com, kevin@koconnor.net, kraxel@redhat.com, qemu-devel@nongnu.org, mst@redhat.com I'm posting it to get an oppinion on one of possible approaches on where to map a hotplug memory. This patch assumes that a space for hotplug memory is located right after RamSizeOver4G region and QEMU will provide romfile to specify where it ends so that BIOS could know from what base to start 64-bit PCI devices mapping. Signed-off-by: Igor Mammedov --- src/fw/pciinit.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index b29db99..62f8d4e 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -18,6 +18,8 @@ #include "paravirt.h" // RamSize #include "string.h" // memset #include "util.h" // pci_setup +#include "byteorder.h" // le64_to_cpu +#include "romfile.h" // romfile_loadint #define PCI_DEVICE_MEM_MIN 0x1000 #define PCI_BRIDGE_IO_MIN 0x1000 @@ -764,6 +766,8 @@ static void pci_bios_map_devices(struct pci_bus *busses) { if (pci_bios_init_root_regions(busses)) { struct pci_region r64_mem, r64_pref; + u64 base64 = le64_to_cpu(romfile_loadint("etc/mem64-end", + 0x100000000ULL + RamSizeOver4G)); r64_mem.list.first = NULL; r64_pref.list.first = NULL; pci_region_migrate_64bit_entries(&busses[0].r[PCI_REGION_TYPE_MEM], @@ -779,7 +783,7 @@ static void pci_bios_map_devices(struct pci_bus *busses) u64 align_mem = pci_region_align(&r64_mem); u64 align_pref = pci_region_align(&r64_pref); - r64_mem.base = ALIGN(0x100000000LL + RamSizeOver4G, align_mem); + r64_mem.base = ALIGN(base64, align_mem); r64_pref.base = ALIGN(r64_mem.base + sum_mem, align_pref); pcimem64_start = r64_mem.base; pcimem64_end = r64_pref.base + sum_pref; -- 1.8.3.1