From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56489) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VW3oD-0008MS-C9 for qemu-devel@nongnu.org; Tue, 15 Oct 2013 08:33:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VW3o7-0003GL-Co for qemu-devel@nongnu.org; Tue, 15 Oct 2013 08:33:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43450) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VW3o7-0003G6-4u for qemu-devel@nongnu.org; Tue, 15 Oct 2013 08:33:03 -0400 From: Igor Mammedov Date: Tue, 15 Oct 2013 14:31:54 +0200 Message-Id: <1381840314-6737-1-git-send-email-imammedo@redhat.com> Subject: [Qemu-devel] [PATCH] map 64-bit PCI BARs at location provided by emulator List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: seabios@seabios.org Cc: pbonzini@redhat.com, kevin@koconnor.net, mst@redhat.com, qemu-devel@nongnu.org, kraxel@redhat.com Currently 64-bit PCI BARs are unconditionally mapped by BIOS right over 4G + RamSizeOver4G location, which doesn't allow to reserve extra space before 64-bit PCI window. For memory hotplug an extra RAM space might be reserved after present 64-bit RAM end and BIOS should map 64-bit PCI BARs after it. Introduce "etc/pcimem64-minimum-addres" romfile to provide BIOS a hint where it should start mapping of 64-bit PCI BARs. If romfile is missing BIOS reverts to legacy behavior and starts mapping right after high memory. Signed-off-by: Igor Mammedov v3: * rename "etc/pcimem64-start" to "etc/pcimem64-minimum-addres" v2: * place 64-bit window behind high RAM end if "etc/pcimem64-start" points below it. --- src/fw/pciinit.c | 13 ++++++++++++- 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index b29db99..64a37c3 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -18,6 +18,8 @@ #include "paravirt.h" // RamSize #include "string.h" // memset #include "util.h" // pci_setup +#include "byteorder.h" // le64_to_cpu +#include "romfile.h" // romfile_loadint #define PCI_DEVICE_MEM_MIN 0x1000 #define PCI_BRIDGE_IO_MIN 0x1000 @@ -764,6 +766,15 @@ static void pci_bios_map_devices(struct pci_bus *busses) { if (pci_bios_init_root_regions(busses)) { struct pci_region r64_mem, r64_pref; + u64 ram64_end = 0x100000000ULL + RamSizeOver4G; + u64 base64 = le64_to_cpu(romfile_loadint("etc/pcimem64-minimum-address", + ram64_end)); + if (base64 < ram64_end) { + dprintf(1, "ignorig etc/pcimem64-minimum-address [0x%llx] below " + "present RAM, placing 64-bit PCI window behind RAM end: " + "0x%llx", base64, ram64_end); + base64 = ram64_end; + } r64_mem.list.first = NULL; r64_pref.list.first = NULL; pci_region_migrate_64bit_entries(&busses[0].r[PCI_REGION_TYPE_MEM], @@ -779,7 +790,7 @@ static void pci_bios_map_devices(struct pci_bus *busses) u64 align_mem = pci_region_align(&r64_mem); u64 align_pref = pci_region_align(&r64_pref); - r64_mem.base = ALIGN(0x100000000LL + RamSizeOver4G, align_mem); + r64_mem.base = ALIGN(base64, align_mem); r64_pref.base = ALIGN(r64_mem.base + sum_mem, align_pref); pcimem64_start = r64_mem.base; pcimem64_end = r64_pref.base + sum_pref; -- 1.7.1