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From: Liu Ping Fan <qemulist@gmail.com>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Anthony Liguori <anthony@codemonkey.ws>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: [Qemu-devel] [PATCH v7 2/4] hpet: enable to entitle more irq pins for hpet
Date: Thu, 17 Oct 2013 11:16:03 +0800	[thread overview]
Message-ID: <1381979765-23092-3-git-send-email-pingfank@linux.vnet.ibm.com> (raw)
In-Reply-To: <1381979765-23092-1-git-send-email-pingfank@linux.vnet.ibm.com>

On q35, IRQ2/8 can be reserved for hpet timer 0/1. And pin 16~23
of ioapic can be dynamically assigned to hpet as guest chooses.
So we introduce intcap property to do that. (currently, its value
is IRQ2. Later, it should be set by board.)

Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com>
---
 hw/timer/hpet.c      | 12 ++++++++++--
 include/hw/i386/pc.h |  2 ++
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 8429eb3..48a13bf 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -42,6 +42,9 @@
 
 #define HPET_MSI_SUPPORT        0
 
+/* Will fix: intcap is set by board, and should be 0 if nobody sets. */
+#define HPET_TN_INT_CAP_DEFAULT 0x4ULL
+
 #define TYPE_HPET "hpet"
 #define HPET(obj) OBJECT_CHECK(HPETState, (obj), TYPE_HPET)
 
@@ -73,6 +76,7 @@ typedef struct HPETState {
     uint8_t rtc_irq_level;
     qemu_irq pit_enabled;
     uint8_t num_timers;
+    uint32_t intcap;
     HPETTimer timer[HPET_MAX_TIMERS];
 
     /* Memory-mapped, software visible registers */
@@ -663,8 +667,8 @@ static void hpet_reset(DeviceState *d)
         if (s->flags & (1 << HPET_MSI_SUPPORT)) {
             timer->config |= HPET_TN_FSB_CAP;
         }
-        /* advertise availability of ioapic inti2 */
-        timer->config |=  0x00000004ULL << 32;
+        /* advertise availability of ioapic int */
+        timer->config |=  (uint64_t)s->intcap << 32;
         timer->period = 0ULL;
         timer->wrap_flag = 0;
     }
@@ -713,6 +717,9 @@ static void hpet_realize(DeviceState *dev, Error **errp)
     int i;
     HPETTimer *timer;
 
+    if (!s->intcap) {
+        error_printf("Hpet's intcap not initialized.\n");
+    }
     if (hpet_cfg.count == UINT8_MAX) {
         /* first instance */
         hpet_cfg.count = 0;
@@ -753,6 +760,7 @@ static void hpet_realize(DeviceState *dev, Error **errp)
 static Property hpet_device_properties[] = {
     DEFINE_PROP_UINT8("timers", HPETState, num_timers, HPET_MIN_TIMERS),
     DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
+    DEFINE_PROP_UINT32(HPET_INTCAP, HPETState, intcap, HPET_TN_INT_CAP_DEFAULT),
     DEFINE_PROP_END_OF_LIST(),
 };
 
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 9b2ddc4..1361a27 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -10,6 +10,8 @@
 
 #include "qemu/range.h"
 
+#define HPET_INTCAP "hpet-intcap"
+
 /* PC-style peripherals (also used by other machines).  */
 
 typedef struct PcPciInfo {
-- 
1.8.1.4

  parent reply	other threads:[~2013-10-17  3:16 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-17  3:16 [Qemu-devel] [PATCH v7 0/4] bugs fix for hpet Liu Ping Fan
2013-10-17  3:16 ` [Qemu-devel] [PATCH v7 1/4] hpet: inverse polarity when pin above ISA_NUM_IRQS Liu Ping Fan
2013-10-17  3:16 ` Liu Ping Fan [this message]
2013-10-17  3:16 ` [Qemu-devel] [PATCH v7 3/4] PC: use qdev_xx to create hpet instead of sysbus_create_xx Liu Ping Fan
2013-10-17  3:16 ` [Qemu-devel] [PATCH v7 4/4] PC: differentiate hpet's interrupt capability on piix and q35 Liu Ping Fan
2013-10-17  5:44   ` Michael S. Tsirkin
2013-10-17  6:27     ` liu ping fan
2013-10-17  6:43       ` Michael S. Tsirkin
2013-10-17 11:19   ` Paolo Bonzini
2013-10-17 11:19   ` Paolo Bonzini
2013-10-17  5:45 ` [Qemu-devel] [PATCH v7 0/4] bugs fix for hpet Michael S. Tsirkin

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