From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40223) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VWo2z-0007ih-Lp for qemu-devel@nongnu.org; Thu, 17 Oct 2013 09:55:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VWo2i-0000zT-GY for qemu-devel@nongnu.org; Thu, 17 Oct 2013 09:55:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11874) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VWo2i-0000ys-7L for qemu-devel@nongnu.org; Thu, 17 Oct 2013 09:55:12 -0400 From: armbru@redhat.com Date: Thu, 17 Oct 2013 15:54:57 +0200 Message-Id: <1382018101-6102-7-git-send-email-armbru@redhat.com> In-Reply-To: <1382018101-6102-1-git-send-email-armbru@redhat.com> References: <1382018101-6102-1-git-send-email-armbru@redhat.com> Subject: [Qemu-devel] [PATCH 06/10] ich9: Document why cannot_instantiate_with_device_add_yet List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kwolf@redhat.com, borntraeger@de.ibm.com, afaerber@suse.de, anthony@codemonkey.ws, peter.maydell@linaro.org From: Markus Armbruster An ICH9 southbridge contains several PCI devices, some of them with multiple functions. We model each function as a separate qdev. Two of them need some special wiring set up in pc_q35_init() to work: the LPC controller at 00:1f.0, and the SMBus controller at 00:1f.3. Signed-off-by: Markus Armbruster --- hw/i2c/smbus_ich9.c | 6 +++++- hw/isa/lpc_ich9.c | 7 +++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c index c1ffa34..8d47eaf 100644 --- a/hw/i2c/smbus_ich9.c +++ b/hw/i2c/smbus_ich9.c @@ -97,11 +97,15 @@ static void ich9_smb_class_init(ObjectClass *klass, void *data) k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6; k->revision = ICH9_A2_SMB_REVISION; k->class_id = PCI_CLASS_SERIAL_SMBUS; - dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */ dc->vmsd = &vmstate_ich9_smbus; dc->desc = "ICH9 SMBUS Bridge"; k->init = ich9_smbus_initfn; k->config_write = ich9_smbus_write_config; + /* + * Reason: part of ICH9 southbridge, needs to be wired up by + * pc_q35_init() + */ + dc->cannot_instantiate_with_device_add_yet = true; } i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base) diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index ad841b5..d00d698 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -604,14 +604,17 @@ static void ich9_lpc_class_init(ObjectClass *klass, void *data) dc->reset = ich9_lpc_reset; k->init = ich9_lpc_initfn; dc->vmsd = &vmstate_ich9_lpc; - dc->cannot_instantiate_with_device_add_yet = true; /* FIXME explain why */ k->config_write = ich9_lpc_config_write; dc->desc = "ICH9 LPC bridge"; k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_8; k->revision = ICH9_A2_LPC_REVISION; k->class_id = PCI_CLASS_BRIDGE_ISA; - + /* + * Reason: part of ICH9 southbridge, needs to be wired up by + * pc_q35_init() + */ + dc->cannot_instantiate_with_device_add_yet = true; } static const TypeInfo ich9_lpc_info = { -- 1.8.1.4