From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35139) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VX1F2-0005pT-UL for qemu-devel@nongnu.org; Fri, 18 Oct 2013 00:00:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VX1Et-000484-9j for qemu-devel@nongnu.org; Fri, 18 Oct 2013 00:00:48 -0400 Received: from mail-ob0-x22b.google.com ([2607:f8b0:4003:c01::22b]:57572) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VX1Es-00044V-Nr for qemu-devel@nongnu.org; Fri, 18 Oct 2013 00:00:38 -0400 Received: by mail-ob0-f171.google.com with SMTP id wn1so2010243obc.2 for ; Thu, 17 Oct 2013 21:00:38 -0700 (PDT) From: Liu Ping Fan Date: Fri, 18 Oct 2013 12:00:48 +0800 Message-Id: <1382068849-25628-2-git-send-email-pingfank@linux.vnet.ibm.com> In-Reply-To: <1382068849-25628-1-git-send-email-pingfank@linux.vnet.ibm.com> References: <1382068849-25628-1-git-send-email-pingfank@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v8 1/2] hpet: inverse polarity when pin above ISA_NUM_IRQS List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Anthony Liguori , "Michael S. Tsirkin" According to hpet spec, hpet irq is high active. But according to ICH spec, there is inversion before the input of ioapic. So the OS will expect low active on this IRQ line. (On bare metal, if OS driver claims high active on this line, spurious irq is generated) We fold the emulation of this inversion inside the hpet logic. Signed-off-by: Liu Ping Fan --- hw/timer/hpet.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index fcd22ae..8429eb3 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -198,13 +198,23 @@ static void update_irq(struct HPETTimer *timer, int set) if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) { s->isr &= ~mask; if (!timer_fsb_route(timer)) { - qemu_irq_lower(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_raise(s->irqs[route]); + } else { + qemu_irq_lower(s->irqs[route]); + } } } else if (timer_fsb_route(timer)) { stl_le_phys(timer->fsb >> 32, timer->fsb & 0xffffffff); } else if (timer->config & HPET_TN_TYPE_LEVEL) { s->isr |= mask; - qemu_irq_raise(s->irqs[route]); + /* fold the ICH PIRQ# pin's internal inversion logic into hpet */ + if (route >= ISA_NUM_IRQS) { + qemu_irq_lower(s->irqs[route]); + } else { + qemu_irq_raise(s->irqs[route]); + } } else { s->isr &= ~mask; qemu_irq_pulse(s->irqs[route]); -- 1.8.1.4