From: Sebastian Macke <sebastian@macke.de>
To: qemu-devel@nongnu.org, proljc@gmail.com
Cc: sebastian@macke.de, openrisc@lists.openrisc.net,
openrisc@lists.opencores.org
Subject: [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flag check of l.addc and l.addic test cases
Date: Tue, 22 Oct 2013 02:12:45 +0200 [thread overview]
Message-ID: <1382400765-26377-10-git-send-email-sebastian@macke.de> (raw)
In-Reply-To: <1382400765-26377-1-git-send-email-sebastian@macke.de>
The test cases did not correctly test for the carry flag.
Signed-off-by: Sebastian Macke <sebastian@macke.de>
---
tests/tcg/openrisc/test_addc.c | 8 +++++---
tests/tcg/openrisc/test_addic.c | 10 ++++++----
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/tests/tcg/openrisc/test_addc.c b/tests/tcg/openrisc/test_addc.c
index 05d18f8..a8f756a 100644
--- a/tests/tcg/openrisc/test_addc.c
+++ b/tests/tcg/openrisc/test_addc.c
@@ -7,9 +7,10 @@ int main(void)
b = 0x01;
c = 0xffffffff;
- result = 1;
+ result = 0;
__asm
- ("l.addc %0, %1, %2\n\t"
+ ("l.add r1, r1, r0\n\t" /* clear carry */
+ "l.addc %0, %1, %2\n\t"
: "=r"(a)
: "r"(b), "r"(c)
);
@@ -22,7 +23,8 @@ int main(void)
c = 0xffffffff;
result = 0x80000001;
__asm
- ("l.addc %0, %1, %2\n\t"
+ ("l.add r1, r1, r0\n\t" /* clear carry */
+ "l.addc %0, %1, %2\n\t"
"l.movhi %2, 0x7fff\n\t"
"l.ori %2, %2, 0xffff\n\t"
"l.addc %0, %1, %2\n\t"
diff --git a/tests/tcg/openrisc/test_addic.c b/tests/tcg/openrisc/test_addic.c
index 4ba7432..857aaa1 100644
--- a/tests/tcg/openrisc/test_addic.c
+++ b/tests/tcg/openrisc/test_addic.c
@@ -6,9 +6,10 @@ int main(void)
int result;
a = 1;
- result = 0x1;
+ result = 0x0;
__asm
- ("l.addic %0, %0, 0xffff\n\t"
+ ("l.add r1, r1, r0\n\t" /* clear carry */
+ "l.addic %0, %0, 0xffff\n\t"
: "+r"(a)
);
if (a != result) {
@@ -16,10 +17,11 @@ int main(void)
return -1;
}
- a = 0x1;
+ a = -1;
result = 0x201;
__asm
- ("l.addic %0, %0, 0xffff\n\t"
+ ("l.add r1, r1, r0\n\t" /* clear carry */
+ "l.addic %0, %0, 0x1\n\t"
"l.ori %0, r0, 0x100\n\t"
"l.addic %0, %0, 0x100\n\t"
: "+r"(a)
--
1.8.4.1
next prev parent reply other threads:[~2013-10-22 0:13 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-22 0:12 [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 1/9] target-openrisc: Speed up move instruction Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 2/9] target-openrisc: Remove unnecessary code generated by jump instructions Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 3/9] target-openrisc: Remove executable flag for every page Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 4/9] target-openrisc: Correct wrong epcr register in interrupt handler Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 5/9] openrisc-timer: Reduce overhead, Separate clock update functions Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 6/9] target-openrisc: Correct memory bounds checking for the tlb buffers Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 7/9] target-openrisc: Separate branch flag from Supervision register Sebastian Macke
2013-10-22 0:12 ` [Qemu-devel] [PATCH_v2 8/9] target-openrisc: Complete remove of npc and ppc variables Sebastian Macke
2013-10-22 0:12 ` Sebastian Macke [this message]
2013-10-22 8:35 ` [Qemu-devel] [PATCH_v2 9/9] target-openrisc: Correct carry flagcheck of l.addc and l.addic test casess Alex Bennée
2013-10-22 15:45 ` Sebastian Macke
2013-10-22 16:01 ` Max Filippov
2013-10-22 16:12 ` Alex Bennée
2013-10-22 16:15 ` Sebastian Macke
2013-10-23 6:52 ` Max Filippov
2013-10-23 3:47 ` [Qemu-devel] [PATCH_v2 0/9] target-openrisc: Corrections and speed improvements Jia Liu
2013-10-24 23:23 ` Sebastian Macke
2013-10-26 0:21 ` Jia Liu
2013-10-28 1:56 ` Sebastian Macke
2013-10-29 7:32 ` Jia Liu
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