From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34193) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZSCg-0002W9-Fb for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:12:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VZSCX-0006PF-V4 for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:12:26 -0400 Received: from mail-la0-x232.google.com ([2a00:1450:4010:c03::232]:63618) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VZSCX-0006Oy-Na for qemu-devel@nongnu.org; Thu, 24 Oct 2013 17:12:17 -0400 Received: by mail-la0-f50.google.com with SMTP id ec20so2350247lab.23 for ; Thu, 24 Oct 2013 14:12:16 -0700 (PDT) Received: from localhost (h59ec325f.selukar.dyn.perspektivbredband.net. [89.236.50.95]) by mx.google.com with ESMTPSA id 8sm3219365laq.5.2013.10.24.14.12.10 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 24 Oct 2013 14:12:11 -0700 (PDT) From: edgar.iglesias@gmail.com Date: Thu, 24 Oct 2013 23:08:51 +0200 Message-Id: <1382648937-14769-5-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1382648937-14769-1-git-send-email-edgar.iglesias@gmail.com> References: <1382648937-14769-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH 04/10] microblaze: Improve srl List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: "Edgar E. Iglesias" write_carry only looks at bit zero, no need to mask out the others. Meassured a 12% speed improvement in linux-user srl loops. Signed-off-by: Edgar E. Iglesias --- target-microblaze/translate.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 916db15..93aafac 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -780,13 +780,10 @@ static void dec_bit(DisasContext *dc) case 0x1: case 0x41: /* srl. */ - t0 = tcg_temp_new(); LOG_DIS("srl r%d r%d\n", dc->rd, dc->ra); - /* Update carry. */ - tcg_gen_andi_tl(t0, cpu_R[dc->ra], 1); - write_carry(dc, t0); - tcg_temp_free(t0); + /* Update carry. Note that write carry only looks at the LSB. */ + write_carry(dc, cpu_R[dc->ra]); if (dc->rd) { if (op == 0x41) tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1); -- 1.7.10.4