From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34074) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbEbf-0003tl-2n for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VbEbY-0005Qo-3r for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:35 -0400 Received: from www11.your-server.de ([213.133.104.11]:59979) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbEbX-0005Pq-U5 for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:28 -0400 From: Sebastian Macke Date: Tue, 29 Oct 2013 20:04:46 +0100 Message-Id: <1383073495-5332-5-git-send-email-sebastian@macke.de> In-Reply-To: <1383073495-5332-1-git-send-email-sebastian@macke.de> References: <1383073495-5332-1-git-send-email-sebastian@macke.de> Subject: [Qemu-devel] [PATCH 04/13] target-openrisc: sync flags only when necessary List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, proljc@gmail.com Cc: Sebastian Macke , openrisc@lists.openrisc.net, openrisc@lists.opencores.org Very often the delayed slot flag is set only to be removed one instruction later. This patch sets this flag only on instructions which could fail and at the end of a translation block if necessary. Signed-off-by: Sebastian Macke --- target-openrisc/translate.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 1bb686c..378ff1b 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -145,12 +145,14 @@ static inline void gen_sync_flags(DisasContext *dc) static void gen_exception(DisasContext *dc, unsigned int excp) { TCGv_i32 tmp = tcg_const_i32(excp); + gen_sync_flags(dc); gen_helper_exception(cpu_env, tmp); tcg_temp_free_i32(tmp); } static void gen_illegal_exception(DisasContext *dc) { + gen_sync_flags(dc); tcg_gen_movi_tl(cpu_pc, dc->pc); gen_exception(dc, EXCP_ILLEGAL); dc->is_jmp = DISAS_UPDATE; @@ -244,7 +246,6 @@ static void gen_jump(DisasContext *dc, uint32_t imm, uint32_t reg, uint32_t op0) dc->delayed_branch = 2; dc->tb_flags |= D_FLAG; - gen_sync_flags(dc); } @@ -703,6 +704,7 @@ static void gen_loadstore(DisasContext *dc, uint32 op0, */ #if !defined(CONFIG_USER_ONLY) tcg_gen_movi_tl(cpu_pc, dc->pc); + gen_sync_flags(dc); #endif TCGv t0 = cpu_R[ra]; @@ -1788,6 +1790,8 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, && (dc->pc < next_page_start) && num_insns < max_insns); + gen_sync_flags(dc); + if (tb->cflags & CF_LAST_IO) { gen_io_end(); } -- 1.8.4.1