From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34085) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbEbg-0003tn-2I for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VbEbZ-0005R5-0h for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:35 -0400 Received: from www11.your-server.de ([213.133.104.11]:60003) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VbEbY-0005Qt-MB for qemu-devel@nongnu.org; Tue, 29 Oct 2013 15:05:28 -0400 From: Sebastian Macke Date: Tue, 29 Oct 2013 20:04:49 +0100 Message-Id: <1383073495-5332-8-git-send-email-sebastian@macke.de> In-Reply-To: <1383073495-5332-1-git-send-email-sebastian@macke.de> References: <1383073495-5332-1-git-send-email-sebastian@macke.de> Subject: [Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, proljc@gmail.com Cc: Sebastian Macke , openrisc@lists.openrisc.net, openrisc@lists.opencores.org srf is a boolean variable. Therefore the instruction should check for != 0 and not for != SR_F Signed-off-by: Sebastian Macke --- target-openrisc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index 378ff1b..9fd1126 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -565,7 +565,7 @@ static void dec_calc(DisasContext *dc, uint32_t insn) int lab = gen_new_label(); TCGv res = tcg_temp_local_new(); tcg_gen_mov_tl(res, cpu_R[rb]); - tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, SR_F, lab); + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_srf, 0, lab); tcg_gen_mov_tl(res, cpu_R[ra]); gen_set_label(lab); tcg_gen_mov_tl(cpu_R[rd], res); -- 1.8.4.1