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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org, tommusta@gmail.com
Cc: qemu-ppc@nongnu.org
Subject: [Qemu-devel] [PATCH V3 10/13] Add xxmrgh/xxmrgl
Date: Fri,  1 Nov 2013 08:21:20 -0500	[thread overview]
Message-ID: <1383312083-2536-11-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1383312083-2536-1-git-send-email-tommusta@gmail.com>

This patch adds the VSX Merge High Word and VSX Merge Low Word
instructions.

V2: Now implemented using deposit (per Richard Henderson's comment)

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/translate.c |   41 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 41 insertions(+), 0 deletions(-)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ab78bf5..e69cbbf 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -7297,6 +7297,45 @@ VSX_LOGICAL(xxlor, tcg_gen_or_tl)
 VSX_LOGICAL(xxlxor, tcg_gen_xor_tl)
 VSX_LOGICAL(xxlnor, tcg_gen_nor_tl)
 
+#define VSX_XXMRG(name, high)                               \
+static void glue(gen_, name)(DisasContext * ctx)            \
+    {                                                       \
+        TCGv_i64 a0, a1, b0, b1;                            \
+        if (unlikely(!ctx->vsx_enabled)) {                  \
+            gen_exception(ctx, POWERPC_EXCP_VSXU);          \
+            return;                                         \
+        }                                                   \
+        a0 = tcg_temp_new();                                \
+        a1 = tcg_temp_new();                                \
+        b0 = tcg_temp_new();                                \
+        b1 = tcg_temp_new();                                \
+        if (high) {                                         \
+            tcg_gen_mov_i64(a0, cpu_vsrh(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(a1, cpu_vsrh(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(b0, cpu_vsrh(xB(ctx->opcode))); \
+            tcg_gen_mov_i64(b1, cpu_vsrh(xB(ctx->opcode))); \
+        } else {                                            \
+            tcg_gen_mov_i64(a0, cpu_vsrl(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(a1, cpu_vsrl(xA(ctx->opcode))); \
+            tcg_gen_mov_i64(b0, cpu_vsrl(xB(ctx->opcode))); \
+            tcg_gen_mov_i64(b1, cpu_vsrl(xB(ctx->opcode))); \
+        }                                                   \
+        tcg_gen_shri_i64(a0, a0, 32);                       \
+        tcg_gen_shri_i64(b0, b0, 32);                       \
+        tcg_gen_deposit_i64(cpu_vsrh(xT(ctx->opcode)),      \
+                            b0, a0, 32, 32);                \
+        tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)),      \
+                            b1, a1, 32, 32);                \
+        tcg_temp_free(a0);                                  \
+        tcg_temp_free(a1);                                  \
+        tcg_temp_free(b0);                                  \
+        tcg_temp_free(b1);                                  \
+    }
+
+VSX_XXMRG(xxmrghw, 1)
+VSX_XXMRG(xxmrglw, 0)
+
+
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -9809,6 +9848,8 @@ VSX_LOGICAL(xxlandc, 0x8, 0x11, PPC2_VSX),
 VSX_LOGICAL(xxlor, 0x8, 0x12, PPC2_VSX),
 VSX_LOGICAL(xxlxor, 0x8, 0x13, PPC2_VSX),
 VSX_LOGICAL(xxlnor, 0x8, 0x14, PPC2_VSX),
+GEN_XX3FORM(xxmrghw, 0x08, 0x02, PPC2_VSX),
+GEN_XX3FORM(xxmrglw, 0x08, 0x06, PPC2_VSX),
 
 GEN_XX3FORM_DM(xxpermdi, 0x08, 0x01),
 
-- 
1.7.1

  parent reply	other threads:[~2013-11-01 13:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-01 13:21 [Qemu-devel] [PATCH V3 00/13] Stage 2 VSX Support Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 01/13] Abandon GEN_VSX_* macros Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 02/13] Add lxsdx Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 03/13] Add lxvdsx Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 04/13] Add lxvw4x Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 05/13] Add stxsdx Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 06/13] Add stxvw4x Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 07/13] Add VSX Scalar Move Instructions Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 08/13] Add VSX Vector " Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 09/13] Add Power7 VSX Logical Instructions Tom Musta
2013-11-01 13:21 ` Tom Musta [this message]
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 11/13] Add xxsel Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 12/13] Add xxspltw Tom Musta
2013-11-01 13:21 ` [Qemu-devel] [PATCH V3 13/13] Add xxsldwi Tom Musta
2013-12-03 16:11 ` [Qemu-devel] [PATCH V3 00/13] Stage 2 VSX Support Tom Musta
2013-12-17 13:34   ` Alexander Graf

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