From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52306) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VcEgJ-0000sX-JB for qemu-devel@nongnu.org; Fri, 01 Nov 2013 09:22:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VcEg9-0001p2-Rq for qemu-devel@nongnu.org; Fri, 01 Nov 2013 09:22:31 -0400 From: Tom Musta Date: Fri, 1 Nov 2013 08:21:16 -0500 Message-Id: <1383312083-2536-7-git-send-email-tommusta@gmail.com> In-Reply-To: <1383312083-2536-1-git-send-email-tommusta@gmail.com> References: <1383312083-2536-1-git-send-email-tommusta@gmail.com> Subject: [Qemu-devel] [PATCH V3 06/13] Add stxvw4x List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, tommusta@gmail.com Cc: qemu-ppc@nongnu.org This patch adds the Store VSX Vector Word*4 Indexed (stxvw4x) instruction. Signed-off-by: Tom Musta --- target-ppc/translate.c | 28 ++++++++++++++++++++++++++++ 1 files changed, 28 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4860e53..047e876 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -7107,6 +7107,33 @@ static void gen_stxvd2x(DisasContext *ctx) tcg_temp_free(EA); } +static void gen_stxvw4x(DisasContext *ctx) +{ + TCGv EA, tmp; + if (unlikely(!ctx->vsx_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VSXU); + return; + } + gen_set_access_type(ctx, ACCESS_INT); + EA = tcg_temp_new(); + gen_addr_reg_index(ctx, EA); + tmp = tcg_temp_new(); + + tcg_gen_shri_i64(tmp, cpu_vsrh(xS(ctx->opcode)), 32); + gen_qemu_st32(ctx, tmp, EA); + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_st32(ctx, cpu_vsrh(xS(ctx->opcode)), EA); + + tcg_gen_shri_i64(tmp, cpu_vsrl(xS(ctx->opcode)), 32); + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_st32(ctx, tmp, EA); + tcg_gen_addi_tl(EA, EA, 4); + gen_qemu_st32(ctx, cpu_vsrl(xS(ctx->opcode)), EA); + + tcg_temp_free(EA); + tcg_temp_free(tmp); +} + static void gen_xxpermdi(DisasContext *ctx) { TCGv_i64 xh, xl; @@ -9593,6 +9620,7 @@ GEN_HANDLER_E(lxvw4x, 0x1F, 0x0C, 0x18, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxsdx, 0x1F, 0xC, 0x16, 0, PPC_NONE, PPC2_VSX), GEN_HANDLER_E(stxvd2x, 0x1F, 0xC, 0x1E, 0, PPC_NONE, PPC2_VSX), +GEN_HANDLER_E(stxvw4x, 0x1F, 0xC, 0x1C, 0, PPC_NONE, PPC2_VSX), #undef GEN_XX3FORM_DM #define GEN_XX3FORM_DM(name, opc2, opc3) \ -- 1.7.1