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[138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.06.26 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:06:27 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:04:32 +1000 Message-Id: <1383786324-18415-10-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 09/61] target-i386: Remove gen_op_ld_T1_A0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Propagate its definition into all users. Signed-off-by: Richard Henderson --- target-i386/translate.c | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index 4d03d53..1f0c441 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -586,11 +586,6 @@ static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0) tcg_gen_qemu_ld_tl(t0, a0, s->mem_index, idx | MO_LE); } -static inline void gen_op_ld_T1_A0(DisasContext *s, int idx) -{ - gen_op_ld_v(s, idx, cpu_T[1], cpu_A0); -} - static inline void gen_op_st_v(DisasContext *s, int idx, TCGv t0, TCGv a0) { tcg_gen_qemu_st_tl(t0, a0, s->mem_index, idx | MO_LE); @@ -1244,7 +1239,7 @@ static inline void gen_lods(DisasContext *s, int ot) static inline void gen_scas(DisasContext *s, int ot) { gen_string_movl_A0_EDI(s); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_op(s, OP_CMPL, ot, R_EAX); gen_op_movl_T0_Dshift(ot); gen_op_add_reg_T0(s->aflag, R_EDI); @@ -1253,7 +1248,7 @@ static inline void gen_scas(DisasContext *s, int ot) static inline void gen_cmps(DisasContext *s, int ot) { gen_string_movl_A0_EDI(s); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_string_movl_A0_ESI(s); gen_op(s, OP_CMPL, ot, OR_TMP0); gen_op_movl_T0_Dshift(ot); @@ -4832,7 +4827,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, rm = (modrm & 7) | REX_B(s); if (mod != 3) { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); } else if (op == OP_XORL && rm == reg) { goto xor_zero; } else { @@ -5163,7 +5158,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_eob(s); break; case 3: /* lcall Ev */ - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); do_lcall: @@ -5189,7 +5184,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_eob(s); break; case 5: /* ljmp Ev */ - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); do_ljmp: @@ -5354,7 +5349,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, } else { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); gen_op_mov_TN_reg(ot, 0, reg); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_op_addl_T0_T1(); gen_op_st_T0_A0(s, ot); gen_op_mov_reg_T1(ot, reg); @@ -5840,7 +5835,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, /* for xchg, lock is implicit */ if (!(prefixes & PREFIX_LOCK)) gen_helper_lock(); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_op_st_T0_A0(s, ot); if (!(prefixes & PREFIX_LOCK)) gen_helper_unlock(); @@ -5871,7 +5866,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (mod == 3) goto illegal_op; gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); - gen_op_ld_T1_A0(s, ot); + gen_op_ld_v(s, ot, cpu_T[1], cpu_A0); gen_add_A0_im(s, 1 << (ot - MO_16 + 1)); /* load the segment first to handle exceptions properly */ gen_op_ld_v(s, MO_16, cpu_T[0], cpu_A0); @@ -7674,7 +7669,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_svm_check_intercept(s, pc_start, op==2 ? SVM_EXIT_GDTR_WRITE : SVM_EXIT_IDTR_WRITE); gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); - gen_op_ld_T1_A0(s, MO_16); + gen_op_ld_v(s, MO_16, cpu_T[1], cpu_A0); gen_add_A0_im(s, 2); gen_op_ld_v(s, CODE64(s) + MO_32, cpu_T[0], cpu_A0); if (!s->dflag) -- 1.8.3.1