From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE3e-0007TS-8Y for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:06:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VeE3Y-0006E1-Ex for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:06:50 -0500 Received: from mail-pb0-x22d.google.com ([2607:f8b0:400e:c01::22d]:43296) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VeE3Y-0006Dt-0p for qemu-devel@nongnu.org; Wed, 06 Nov 2013 20:06:44 -0500 Received: by mail-pb0-f45.google.com with SMTP id ma3so306334pbc.18 for ; Wed, 06 Nov 2013 17:06:43 -0800 (PST) Received: from pebble.com (CPE-138-130-249-46.lnse4.cha.bigpond.net.au. [138.130.249.46]) by mx.google.com with ESMTPSA id xs1sm1726198pac.7.2013.11.06.17.06.40 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Nov 2013 17:06:42 -0800 (PST) Sender: Richard Henderson From: Richard Henderson Date: Thu, 7 Nov 2013 11:04:38 +1000 Message-Id: <1383786324-18415-16-git-send-email-rth@twiddle.net> In-Reply-To: <1383786324-18415-1-git-send-email-rth@twiddle.net> References: <1383786324-18415-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH for-1.8 15/61] target-i386: Tidy mov[sz][bw] List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org We can use the MO_SIGN bit to tidy the reg-reg switch statement as well as pass it on to gen_op_ld_v, eliminating one call. Signed-off-by: Richard Henderson --- target-i386/translate.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target-i386/translate.c b/target-i386/translate.c index e89991e..31e6d77 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -5615,11 +5615,16 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x1be: /* movsbS Gv, Eb */ case 0x1bf: /* movswS Gv, Eb */ { - int d_ot; + TCGMemOp d_ot; + TCGMemOp s_ot; + /* d_ot is the size of destination */ d_ot = dflag + MO_16; /* ot is the size of source */ ot = (b & 1) + MO_8; + /* s_ot is the sign+size of source */ + s_ot = b & 8 ? MO_SIGN | ot : ot; + modrm = cpu_ldub_code(env, s->pc++); reg = ((modrm >> 3) & 7) | rex_r; mod = (modrm >> 6) & 3; @@ -5627,29 +5632,25 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, if (mod == 3) { gen_op_mov_TN_reg(ot, 0, rm); - switch(ot | (b & 8)) { - case MO_8: + switch (s_ot) { + case MO_UB: tcg_gen_ext8u_tl(cpu_T[0], cpu_T[0]); break; - case MO_8 | 8: + case MO_SB: tcg_gen_ext8s_tl(cpu_T[0], cpu_T[0]); break; - case MO_16: + case MO_UW: tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]); break; default: - case MO_16 | 8: + case MO_SW: tcg_gen_ext16s_tl(cpu_T[0], cpu_T[0]); break; } gen_op_mov_reg_T0(d_ot, reg); } else { gen_lea_modrm(env, s, modrm, ®_addr, &offset_addr); - if (b & 8) { - gen_op_ld_v(s, ot | MO_SIGN, cpu_T[0], cpu_A0); - } else { - gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); - } + gen_op_ld_v(s, s_ot, cpu_T[0], cpu_A0); gen_op_mov_reg_T0(d_ot, reg); } } -- 1.8.3.1